[AX301][Verilog]02_key_test
2018-03-13 14:29
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//KeyTest_method1_naive module key_test ( input[3:0] key_in, output[3:0] led_out ); assign led_out = ~key_in; endmodule
//KeyTest_method2_照搬原文 module key_TEST ( clk, key_in, led_out ); //Port declaration input clk; input [3:0] key_in; output [3:0] led_out; wire rst_n = 1'b1;//由于板子上只有四个键,所以把复位键置1(使其不起作用) //寄存器定义 reg[19:0] count; reg[3:0] key_scan; //按键状态的采样,20ms扫描一次 //================================================= always @(posedge clk or negedge rst_n) begin if(!rst_n) //复位键,低电平(按下)有效 count <= 20'd0; else begin if(count == 20'd999_999)//AX301的晶振是50MHz,也就是一秒50M下,则20ms有50M/50下,即数到20ms计数为50MHz/50-1【这条命令是指数到20ms时】 begin count <= 20'b0;//计数器清零 key_scan <= key_in;//清零的同时,把此时的按键状态获取到。 end else count <= count + 20'b1;//当不足20ms时,持续计数,每一个CLK的上升沿进行+1操作 end end //-------------------------------------------------并行子段1 //得到按键状态变化的时刻 reg[3:0] key_scan_r; //================================================= always @(posedge clk) key_scan_r <= key_scan; //-------------------------------------------------并行子段2 wire [3:0] flag_key = key_scan_r[3:0] & (~key_scan[3:0]);//当按键按下时(但还没有出现CLK的上升沿时)flag_key为1,其他情况均为0,【=>flaf_key指按键变化的时候,若按键状态变化,值为1;若按键状态没变,值为0】 //================================================== //在按键状态变化时,LED灯反转 reg[3:0] temp_led; always@(posedge clk or negedge rst_n) begin if(~rst_n) //复位信号,低有效 temp_led <=4'b1111;//LED灯控制信号输出为低,LED灯全灭 else begin if(flag_key[0]) //如果flag_key为+时,led亮灭反转 temp_led[0] <= ~temp_led[0]; if(flag_key[1]) //如果flag_key为+时,led亮灭反转 temp_led[1] <= ~temp_led[1]; if(flag_key[2]) //如果flag_key为+时,led亮灭反转 temp_led[2] <= ~temp_led[2]; if(flag_key[3]) //如果flag_key为+时,led亮灭反转 temp_led[3] <= ~temp_led[3]; end end //------------------------------------------------并行子段3 assign led_out[0] = temp_led[0]; assign led_out[1] = temp_led[1]; assign led_out[2] = temp_led[2]; assign led_out[3] = temp_led[3]; endmodule
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