RK3288_LCDC0 5.1SDK 无RGB 问题

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代码分析：

struct rk_lcdc_driver {

struct rk_fb_trsm_ops *trsm_ops;

}

struct rk_fb_trsm_ops {

        int (*enable)(void);

        int (*disable)(void);

        int (*dsp_pwr_on) (void);

        int (*dsp_pwr_off) (void);

};

vi drivers/video/rockchip/transmitter/rk32_lvds.c

static struct rk_fb_trsm_ops trsm_lvds_ops = {
.enable = rk32_lvds_en,
.disable = rk32_lvds_disable,
};

在static int rk32_lvds_en(void) 有设置RGB或者LVDS输出！！！！

static int rk32_lvds_en(void)
{
struct rk32_lvds *lvds = rk32_lvds;
struct rk_screen *screen = &lvds->screen;
u32 h_bp = 0;
u32 val = 0;

rk_fb_get_prmry_screen(screen);

/* enable clk */
rk32_lvds_clk_enable(lvds);

/* select lcdc source */
if (screen->lcdc_id == 1) /*lcdc1 = vop little,lcdc0 = vop big*/
val = LVDS_SEL_VOP_LIT | (LVDS_SEL_VOP_LIT << 16);
else
val = LVDS_SEL_VOP_LIT << 16;
grf_writel(val, RK3288_GRF_SOC_CON6);

/* set lvds format */
val = screen->lvds_format;
if ((screen->type == SCREEN_DUAL_LVDS) ||
(screen->type == SCREEN_DUAL_LVDS_10BIT))
val |= LVDS_DUAL | LVDS_CH0_EN | LVDS_CH1_EN;
else if((screen->type == SCREEN_LVDS) ||
(screen->type == SCREEN_LVDS_10BIT))
val |= LVDS_CH0_EN;
else if (screen->type == SCREEN_RGB)
val |= LVDS_TTL_EN | LVDS_CH0_EN | LVDS_CH1_EN;

h_bp = screen->mode.hsync_len + screen->mode.left_margin;
if (h_bp & 0x01)
val |= LVDS_START_PHASE_RST_1;

val |= (screen->pin_dclk << 8) | (screen->pin_hsync << 9) |
(screen->pin_den << 10);
val |= (0xffff << 16);
grf_writel(val, RK3288_GRF_SOC_CON7);

printk("jiangdou____screen is rk32_lvds_en into....\n");
if (screen->type == SCREEN_RGB) {
val = 0x007f007f;//0x1<<6 |0x1 <<4;
grf_writel(val, RK3288_GRF_GPIO1D_IOMUX);
printk("jiangdou____screen is RGB OK!!....\n");
lvds_writel(lvds, LVDS_CH0_REG_0, 0x7f);
lvds_writel(lvds, LVDS_CH0_REG_1, 0x40);
lvds_writel(lvds, LVDS_CH0_REG_2, 0x00);

lvds_writel(lvds, LVDS_CH0_REG_4, 0x3f);
lvds_writel(lvds, LVDS_CH0_REG_5, 0x3f);
lvds_writel(lvds, LVDS_CH0_REG_3, 0x46);
lvds_writel(lvds, LVDS_CH0_REG_d, 0x0a);
lvds_writel(lvds, LVDS_CH0_REG_20,0x44);/* 44:LSB  45:MSB*/
writel_relaxed(0x00, lvds->regs + LVDS_CFG_REG_c); /*eanble pll*/
writel_relaxed(0x92, lvds->regs + LVDS_CFG_REG_21); /*enable tx*/

lvds_writel(lvds, 0x100, 0x7f);
lvds_writel(lvds, 0x104, 0x40);
lvds_writel(lvds, 0x108, 0x00);
lvds_writel(lvds, 0x10c, 0x46);
lvds_writel(lvds, 0x110, 0x3f);
lvds_writel(lvds, 0x114, 0x3f);
lvds_writel(lvds, 0x134, 0x0a);
} else {
lvds_writel(lvds, LVDS_CH0_REG_0, 0xbf);
lvds_writel(lvds, LVDS_CH0_REG_1, 0x3f);
lvds_writel(lvds, LVDS_CH0_REG_2, 0xfe);
lvds_writel(lvds, LVDS_CH0_REG_3, 0x46);
lvds_writel(lvds, LVDS_CH0_REG_4, 0x00);
lvds_writel(lvds, LVDS_CH0_REG_d, 0x0a);
lvds_writel(lvds, LVDS_CH0_REG_20,0x44);/* 44:LSB  45:MSB*/
writel_relaxed(0x00, lvds->regs + LVDS_CFG_REG_c); /*eanble pll*/
writel_relaxed(0x92, lvds->regs + LVDS_CFG_REG_21); /*enable tx*/
}

msleep(500);
return 0;
}

drivers/video/rockchip/rk_fb.c

drivers/video/rockchip/lcdc/rk3288_lcdc.c

在drivers/video/rockchip/lcdc/rk3288_lcdc.c  中

static int rk3288_load_screen(struct rk_lcdc_driver *dev_drv, bool initscreen)
{
u16 face = 0;
u32 v=0;
struct lcdc_device *lcdc_dev =
container_of(dev_drv, struct lcdc_device, driver);
struct rk_screen *screen = dev_drv->cur_screen;
u16 hsync_len = screen->mode.hsync_len;
u16 left_margin = screen->mode.left_margin;
u16 right_margin = screen->mode.right_margin;
u16 vsync_len = screen->mode.vsync_len;
u16 upper_margin = screen->mode.upper_margin;
u16 lower_margin = screen->mode.lower_margin;
u16 x_res = screen->mode.xres;
u16 y_res = screen->mode.yres;
u32 mask, val;
u16 h_total,v_total;
if (unlikely(!lcdc_dev->clk_on)) {
pr_info("%s,clk_on = %d\n", __func__, lcdc_dev->clk_on);
return 0;
}

h_total = hsync_len + left_margin  + x_res + right_margin;
v_total = vsync_len + upper_margin + y_res + lower_margin;

screen->post_dsp_stx = x_res * (100 - screen->overscan.left) / 200;
screen->post_dsp_sty = y_res * (100 - screen->overscan.top) / 200;
screen->post_xsize = x_res * (screen->overscan.left + screen->overscan.right) / 200;
screen->post_ysize = y_res * (screen->overscan.top + screen->overscan.bottom) / 200;

spin_lock(&lcdc_dev->reg_lock);
if (likely(lcdc_dev->clk_on)) {
switch (screen->face) {
case OUT_P565:
face = OUT_P565;
mask = m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE |
m_DITHER_DOWN_SEL | m_DITHER_UP_EN |
m_PRE_DITHER_DOWN_EN;
val = v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(0) |
v_DITHER_DOWN_SEL(1) | v_DITHER_UP_EN(1) |
v_PRE_DITHER_DOWN_EN(1);
lcdc_msk_reg(lcdc_dev, DSP_CTRL1, mask, val);
break;
case OUT_P666:
face = OUT_P666;
mask = m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE |
m_DITHER_DOWN_SEL | m_DITHER_UP_EN |
m_PRE_DITHER_DOWN_EN;
val = v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(1) |
v_DITHER_DOWN_SEL(1) | v_DITHER_UP_EN(1) |
v_PRE_DITHER_DOWN_EN(1);
lcdc_msk_reg(lcdc_dev, DSP_CTRL1, mask, val);
break;
case OUT_D888_P565:
face = OUT_P888;
mask = m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE |
m_DITHER_DOWN_SEL | m_DITHER_UP_EN |
m_PRE_DITHER_DOWN_EN;
val = v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(0) |
v_DITHER_DOWN_SEL(1) | v_DITHER_UP_EN(1) |
v_PRE_DITHER_DOWN_EN(1);
lcdc_msk_reg(lcdc_dev, DSP_CTRL1, mask, val);
break;
case OUT_D888_P666:
face = OUT_P888;
mask = m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE |
m_DITHER_DOWN_SEL | m_DITHER_UP_EN |
m_PRE_DITHER_DOWN_EN;
val = v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(1) |
v_DITHER_DOWN_SEL(1) | v_DITHER_UP_EN(1) |
v_PRE_DITHER_DOWN_EN(1);
lcdc_msk_reg(lcdc_dev, DSP_CTRL1, mask, val);
break;
case OUT_P888:
face = OUT_P888;
mask = m_DITHER_DOWN_EN | m_DITHER_UP_EN |
m_PRE_DITHER_DOWN_EN;
val = v_DITHER_DOWN_EN(0) | v_DITHER_UP_EN(1) |
v_PRE_DITHER_DOWN_EN(1);
lcdc_msk_reg(lcdc_dev, DSP_CTRL1, mask, val);
break;
case OUT_P101010:
face = OUT_P101010;
mask = m_DITHER_DOWN_EN | m_DITHER_UP_EN |
m_PRE_DITHER_DOWN_EN;
val = v_DITHER_DOWN_EN(0) | v_DITHER_UP_EN(1) |
v_PRE_DITHER_DOWN_EN(0);
lcdc_msk_reg(lcdc_dev, DSP_CTRL1, mask, val);
break;
default:
dev_err(lcdc_dev->dev,"un supported interface!\n");
break;
}
switch(screen->type){
case SCREEN_RGB:
case SCREEN_LVDS:
case SCREEN_DUAL_LVDS:
case SCREEN_LVDS_10BIT:
case SCREEN_DUAL_LVDS_10BIT:
mask = m_RGB_OUT_EN;
val = v_RGB_OUT_EN(1);
v = 1 << (3+16);
v |= (lcdc_dev->id << 3);
break;
case SCREEN_HDMI:
face = OUT_P101010;/*RGB 101010 output*/
mask = m_HDMI_OUT_EN;
val = v_HDMI_OUT_EN(1);
break;
case SCREEN_MIPI:
mask = m_MIPI_OUT_EN;
val = v_MIPI_OUT_EN(1);
break;
case SCREEN_DUAL_MIPI:
mask = m_MIPI_OUT_EN | m_DOUB_CHANNEL_EN;
val = v_MIPI_OUT_EN(1) | v_DOUB_CHANNEL_EN(1);
break;
case SCREEN_EDP:
face = OUT_P101010;  /*RGB 101010 output*/
mask = m_EDP_OUT_EN;
val = v_EDP_OUT_EN(1);
break;
}
lcdc_msk_reg(lcdc_dev, SYS_CTRL, mask, val);
#ifndef CONFIG_RK_FPGA
writel_relaxed(v, RK_GRF_VIRT + RK3288_GRF_SOC_CON6);
#endif
mask = m_DSP_OUT_MODE | m_DSP_HSYNC_POL | m_DSP_VSYNC_POL |
m_DSP_DEN_POL | m_DSP_DCLK_POL | m_DSP_BG_SWAP |
m_DSP_RB_SWAP | m_DSP_RG_SWAP | m_DSP_DELTA_SWAP |
m_DSP_DUMMY_SWAP | m_DSP_OUT_ZERO | m_DSP_BLANK_EN |
m_DSP_BLACK_EN | m_DSP_X_MIR_EN | m_DSP_Y_MIR_EN;
val = v_DSP_OUT_MODE(face) | v_DSP_HSYNC_POL(screen->pin_hsync) |
v_DSP_VSYNC_POL(screen->pin_vsync) |
v_DSP_DEN_POL(screen->pin_den) | v_DSP_DCLK_POL(screen->pin_dclk) |
v_DSP_BG_SWAP(screen->swap_gb) | v_DSP_RB_SWAP(screen->swap_rb) |
v_DSP_RG_SWAP(screen->swap_rg) |
v_DSP_DELTA_SWAP(screen->swap_delta) |
v_DSP_DUMMY_SWAP(screen->swap_dumy) | v_DSP_OUT_ZERO(0) |
v_DSP_BLANK_EN(0) | v_DSP_BLACK_EN(0) |
v_DSP_X_MIR_EN(screen->x_mirror) | v_DSP_Y_MIR_EN(screen->y_mirror);
lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);

mask = m_DSP_BG_BLUE | m_DSP_BG_GREEN | m_DSP_BG_RED;
val  = v_DSP_BG_BLUE(0) | v_DSP_BG_GREEN(0) | v_DSP_BG_RED(0);
lcdc_msk_reg(lcdc_dev, DSP_BG, mask, val);

mask = m_DSP_HS_PW | m_DSP_HTOTAL;
val = v_DSP_HS_PW(hsync_len) | v_DSP_HTOTAL(h_total);
lcdc_msk_reg(lcdc_dev, DSP_HTOTAL_HS_END, mask, val);

mask = m_DSP_HACT_END | m_DSP_HACT_ST;
val = v_DSP_HACT_END(hsync_len + left_margin + x_res) |
v_DSP_HACT_ST(hsync_len + left_margin);
lcdc_msk_reg(lcdc_dev, DSP_HACT_ST_END, mask, val);

mask = m_DSP_VS_PW | m_DSP_VTOTAL;
val = v_DSP_VS_PW(vsync_len) | v_DSP_VTOTAL(v_total);
lcdc_msk_reg(lcdc_dev, DSP_VTOTAL_VS_END, mask, val);

mask = m_DSP_VACT_END | m_DSP_VACT_ST;
val = v_DSP_VACT_END(vsync_len + upper_margin + y_res) |
v_DSP_VACT_ST(vsync_len + upper_margin);
lcdc_msk_reg(lcdc_dev, DSP_VACT_ST_END, mask, val);

rk3288_lcdc_post_cfg(dev_drv);
mask = m_DSP_LINE_FLAG_NUM;
val = v_DSP_LINE_FLAG_NUM(vsync_len + upper_margin + y_res);
lcdc_msk_reg(lcdc_dev, INTR_CTRL0, mask, val);
}
spin_unlock(&lcdc_dev->reg_lock);
rk3288_lcdc_set_dclk(dev_drv, 1);
if (screen->type != SCREEN_HDMI && dev_drv->trsm_ops &&
dev_drv->trsm_ops->enable){
dev_drv->trsm_ops->enable();
printk("jiangdou____screen is RGB OK!!....112311\n");
}else{
printk("jiangdou____screen is RGB OK!!....fail....\n");
}
if (screen->init)
screen->init();

return 0;
}

5# adb  shell 如下：

shell@rk3288:/ # dmesg |grep jiang
<4>[ 0.618399] jiangdou____screen is RGB OK!!....11111
<4>[ 0.637894] jiangdou____screen is RGB OK!!....fail.... //此处说明没有具体的连接！！？？？
shell@rk3288:/ #

33##修改文件drivers/video/rockchip/transmitter/rk32_lvds.c   //开机过程会有短暂500ms的RGB信号输出！！！！

}

rk32_lvds = lvds;
rk_fb_trsm_ops_register(&trsm_lvds_ops,SCREEN_LVDS);
dev_info(&pdev->dev, "rk32 lvds driver probe success\n");
//=========add for RGB TEST by jiangdou===={---START
#if 1 //add start by jiangdou
rk32_lvds_en();
msleep(500);
printk("jiangdou____screen is RGB OK!!....11111\n");
#endif
//=========add for RGB TEST by jiangdou====END---}
return 0;
}

static void rk32_lvds_shutdown(struct platform_device *pdev)
{

}

7#