0xcf8 揭底

Seeing a code starting from 0xcf8, I didnot know what it is, so checked and got some idea. Here they are.

Refer from: https://en.wikipedia.org/wiki/PCI_configuration_space (More info, refer here.)

Configuration reads and writes can be initiated from the CPU in two ways: one legacy method via I/O addresses
0xCF8 and 0xCFC, and another called memory-mapped configuration.

The legacy method was present in the original PCI, and it is called Configuration Access Mechanism (CAM). It allows for 256 bytes of a device's address space to be reached indirectly via two 32-bit registers called
PCI CONFIG_ADDRESS and PCI CONFIG_DATA. These registers are at addresses 0xCF8 and
0xCFC in the x86 I/O address space.[3] For example, a software driver (firmware, OS kernel or kernel driver)
can use these registers to configure a PCI device by writing the address of the device's register into CONFIG_ADDRESS, and by putting the data that is supposed to be written to the device into CONFIG_DATA. Since this process requires a write to a register
in order to write the device’s register, it is referred to as "indirection".

The format of CONFIG_ADDRESS is the following:

0x80000000 | bus << 16 | device << 11 | function <<  8 | offset

As explained previously, addressing a device via Bus, Device, and Function (BDF) is also referred to as "addressing a device geographically." See

arch/x86/pci/early.c

in the Linux kernel
code for an example of code that uses geographical addressing.[4]

The second method was created for PCI Express. It is called Enhanced Configuration Access Mechanism (ECAM). It extends device's configuration space to 4k, with the bottom 256 bytes overlapping the original (legacy)
configuration space in PCI. The section of the addressable space is "stolen" so that the accesses from the CPU don't go to memory but rather reach a given device in the PCI Express fabric. During system initialization, firmware determines the base address
for this “stolen” address region and communicates it to the root complex and to the operating system. This communication method is implementation-specific, and not defined in the PCI Express specification.

说简单一点就是要对CPU进行初始化读写操作，其中一个方法是从地址入口0xcf8或0xcfc进入。