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modelsim do 文件

2014-12-09 23:07 274 查看
下边是写的do文件的例子。

#creat a work lib

vlib work

#map the work lib to current lib

vmap work work

#compile the source files

vlog +acc -work work "F:/modelsimproject/data_mem/src/fifo32x16.v"

vlog +acc -work work "F:/modelsimproject/data_mem/src/fifo32x16_top.v"

vlog +acc -work work "F:/modelsimproject/data_mem/src/mem32x4k.v"

vlog +acc -work work "F:/modelsimproject/data_mem/src/output_sel.v"

vlog +acc -work work "F:/modelsimproject/data_mem/src/rd_ctrl.v"

vlog +acc -work work "F:/modelsimproject/data_mem/src/rd_wr_blk_reg.v"

vlog +acc -work work "F:/modelsimproject/data_mem/src/wr_ctrl.v"

vlog +acc -work work "F:/modelsimproject/data_mem/src/data_mem_top.v"

vlog +acc -work work "F:/modelsimproject/data_mem/src/test_data_mem.v"

vlog +acc -work work "D:/Xilinx/14.7/ISE_DS/ISE/verilog/src/glbl.v"

#start simulator

vsim -t fs -novopt +notimingchecks -L E:/xilinx_lib/xilinxcorelib_ver \

-L E:/xilinx_lib/simprims_ver -L E:/xilinx_lib/unisims_ver \

-L E:/xilinx_lib/unimacro_ver work.test_data_mem work.glbl

log -r *

#add wave

add wave -hex sim:/*

#run

run -all
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