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ARM指令集笔记

2014-04-17 11:44 309 查看
ARM指令的基本格式:<opcode>{<cond>}{S}<Rd>,<Rn>{,<opcode2>}

cond:

EQZ=1

NEZ=0

CSC=1

CCC=0

GTZ=0,N=V

LEZ=1,N!=V

AL\

LDMIA R0,{R1-R4} :R0没变

LDMIA R0!,{R1-R4} :R0变了

MOV R0 , #8;R0=8

MOV R0 , R1;R0<---R1

MOV R0 , R1,LSL #3
;R0<---(R1<<3)

MOV PC, LR;R15<---R14

ADD R0, R1,#1
;R0<---(R1+1)

ADDS R0, R1,#1
;会影响CPSR的标记位

BIC R0,R0,
#0xF;clear bits

ORR R0, R0,
#0xF ;SET BITS

MRS R0, CPSR
;R0<---CPSR

BIC R0,
R0, #0x1F

ORR R0, R0,
#0xD3

MSR CPSR_cxsf , R0

mrc p15, 0, r0, c1, c0, 0
;r0<---c1

mcr p15, 0, r0, c1, c0, 0
;c1<---r0

mov r1, #9 ;r1<--9

mov r2, r1 ;r2<--r1

mov r2, r1, lsl #3
;r2<--(r1<<3)

ldr r1, [r0]
;r1<--[r0]

swp r2, r2, [r1] ;r2<--(r2<-->[r1])

ldr r1, [r0, #4]
;r1<--[r0+4]

stmfd sp!, {r0-r2} ;入栈,sp跟新

ldmfd sp!, {r0-r2} ;出栈,sp跟新

GET 2440addr.inc

AREA Init, CODE, READONLY

ENTRY

END

一.Symbol Definition////////////////////////////////////////////////////

1.GBLA/GBLL/GBLS//////////////////////////

GBLA Number1

Number1 SETA 0xaa

GBLL True1

True1 SETL {TRUE}

GBLS String1

String1 SETS "Testing"

2.LCLA/LCLL/LCLS//////////////////////////

LCLA Number2

Number2 SETA 0xaa

LCLL True2

True2 SETL {TRUE}

LCLS String2

String2 SETS "Testing"

3.RLIST//////////////////////////

RegList RLIST {R0-R5,R8,R10}

STMFD SP!,RegList

二.Data Definition////////////////////////////////////////////////////

1.DCB//////////////////////////

Sting DCB "This is a test!"

Parameter DCB 0x33,0x44,0x55

DCB -1,-2,0,1,2

2.DCW//////////////////////////

Data DCW 0,1,2,3

3.DCD//////////////////////////

Data DCD 3,4,5,6

4.DCFD//////////////////////////

Fdata DCFD 0,2E115,-5E7

5.DCFS//////////////////////////

Sdata DCFS 1,2E5,-5E7

6.DCQ//////////////////////////

Data DCQ 100,1000

7.DCDO//////////////////////////

IMPORT externsys

Data DCDO externsys

8.DCI//////////////////////////

MACRO

newinstr $Rd,$Rm

DCI 0Xe15f0f10: CR: (8$Rd: SHL: 12): OR: $Rm

9.SPACE//////////////////////////

DataSpace SPACE 1000

10.MAP//////////////////////////

MAP 0x10 ,R0

11.FIELD//////////////////////////

MAP 0x100

A FIELD 16

B FIELD 32

S FIELD 256

12.LTORG//////////////////////////

LDR R0,=0x12345

ADD R1,R1,R0

MOV PC,LR

LTORG

...

三.Assembly Control////////////////////////////////////////////////////

1.IF/ELSE/ENDIF//////////////////////////

IF Version="V1"

......

ELSE

..........

ENDIF

2.WHILE/WEND//////////////////////////

WHILE Counter<10

.......

WEND

3.MACRO/MEND//////////////////////////

MACRO

CODE_1

LDR R0,=rPDATG

LDR R1,[R0]

ORR R1,R1,#0X01

SRT R1,[R0]

MEND

4.MEXIT//////////////////////////

5.AREA/ALIGN/CODE16/CODE32/ENTRY/END/EQU/EXPORT(GLOBAL)/IMPORT/GET(INCLUDE)/INGBIN/RN/ROUT

AREA Init,CODE,READONLY

AREA Init,CODE,READONLY,ALIGN=3

CODE32

.....

CODE16

.....

ENTRY

END

ABCE EQU label+8

Test EQU 50

Addr EQU 0x55,CODE32

EXPORT main

IMPORT main

GET a1.s

GE T C:\a2.s

INCBIN a1.dat

INCBIN C:\a2.txt

INCBIN a3.bin

Counter RN R0

四.Programming////////////////////////////////////////////////////

1.program structure//////////////////////////

AREA Init,CODE,READONLY

ENTRY

Start

LDR R0,=0x3FF5000

LDR R1,0xFF

STR R1,[R0]

LDR R0,=0x3FF5008

LDR R1,0x01

STR R1,[R0]

...

END

2.Subroutine call//////////////////////////

AREA Init,CODE,READONLY

ENTRY

Start

LDR R0,=0x3FF5000

LDR R1,0xFF

STR R1,[R0]

LDR R0,=0x3FF5008

LDR R1,0x01

STR R1,[R0]

BL PRINT_TEXT

...

PRINT_TEXT

...

MOV PC,BL

..

END

3.macro definition//////////////////////////

MACRO

CALLSubfunction $Funtion,$dat1,$dat2

IMPORT $Funtion

MOV R0,$dat1

MOV R1,$dat2

BL Funtion

MEND

...

CALL FADD1,#3,#2

4.Compare And B//////////////////////////

CMP R5,#10

BEQ BRANCH1

...

CMP R1,R2

ADDHI R1,R1,#1

ADDLS R1,R1,#2

...

ANDS R1,R1,#0x80

BNE WAIT

5.LOOP//////////////////////////

MOV R0,#10

LOOP

...

SUBS R0,R0,#1

BEN LOOP

...

6.Data Block Copy//////////////////////////

LDR R0,=DATA_DST

LDR R1,=DATA_SRC

MOV R10,#10

LOOP LDMIA R1!,{R2-R9}

STMIA R0!,{R2,R9}

SUBS R10,R10,#1

BNE LOOP

...

7.Stack Operation//////////////////////////

OUTDAT

STMFD SP! {R0-R7,LR}

...

BL DELAY

...

LDMFD SP! {R0-R7,PC}

8.Table Look//////////////////////////

...

LDR R3,=DISP_TAB

LDR R2,[R3,R5,LSL,#2]

...

DISP_TAB DCD 0xC0, 0xF9, 0xA4, 0x99, 0x92

DCD 0x82, 0xF8, 0x80, 0x90, 0x88, 0x83

DCD 0xC6, 0xA1, 0x86, 0x8E, 0xFF

9.Long Jump//////////////////////////

ADD LR, PC, #4

LDR PC,=JUMP_FUNC

DCD RET_FUNC

...

DCD JUMP_FUNC

10.Samaphore support//////////////////////////

DISP_SEM EQU 0x40002A00

...

DISP_WAIT MOV R1,#0

LDR R0,=DISP_SEM

SWP R1,R1,[R0]

CMP R1,#0

BEQ DISP_WAIT

11.Register//////////////////////////

WDTC EQU 0xE000000

...

LDR R0,=WDTC

MOV R1,#12

STR R1,[R0]

12.Piece of external parts//////////////////////////

LDR R0,=GPIO_BASE

MOV R1,#0x00

STR R1,[R0,#0x04]

MOV R1,#0x10

STR R1,[R0,#0x0C]
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