TW2835应用，在CVBS 中，如何理解Signal timing和 和Croping

问1：     根据TW2823的数据手册,,外部输入经过抗混叠滤波器,彩色解码,通过两个H/V Crop & Scaler分别提供给display path和record path,但display path和record path是共用HDELAY、HACTIVE、VDELAY、VACTIVE寄存器的,若display path和record path需要设置不同的HDELAY、HACTIVE、VDELAY、VACTIVE值,如何操作?

答1：

a). 在输入端，Croping在是针对Channel而言的，不是针对Path而言的,这个每个通道都有自己的寄存器来配置HDELAY、HACTIVE、VDELAY、VACTIVE。

b).而Analog CVBS encoder的Sigal timing是通过ENC_HSDEL，ENC_VSDEL,ENC_VSOFF来控制，其video shift是通过ACTIVE_VDEL，ACTIVE_HDEL来实现调整的。

引申阅读，在Datasheet的章节Timing Interface and Control中，有描述The TW2835 provides or receives the timing signal through the HSENC, VSENC and FLDENC

pins. To adjust the timing of those pins from video output, the TW2835 has the ENC_HSDEL(1xA6), ENC_VSDEL and ENC_VSOFF (1xA5) registers which control only the related signaltiming regardless of analog and digital video output. Likewise, by controlling the
ACTIVE_VDEL(1xA7) and ACTIVE_HDEL (1xA8) registers, only active video period can be shifted on horizontal and vertical direction independently. The shift of active video period produces the cropped video image because the timing signal is not changed even
though active period is moved. So this feature is restricted to adjust video location in monitor.