[Reminder] 影响EMIF16异步读写性能因素

Performance degradation for asynchronous accesses caused by an unused feature enabled in EMIF16

Devices affected:
C6671, C6672, C6674, C6678, C6654, C6655, C6657, TCI6602, TCI6604, TCI6608, TCI6612, TCI6614

Revisions: All

Detailed description
Although it supports only asynchronous mode operation on all Keystone ‐I devices, the EMIF16 module
has a legacy ‘synchronous mode’ feature that is enabled by default. While this synchronous mode is
enabled, EMIF16 issues periodic refresh commands that take precedence over asynchronous accesses
commands and stall the execution of the latter until the refresh command is executed. This stall results
in reduced throughput of asynchronous accesses when EMIF16 tries to read or write to the
asynchronous memory. The stall will manifest itself as a long delay between asynchronous accesses.

Workaround:
Programming bit 31 at the 32‐bit address 0x20C00008 to 1 will disable the synchronous mode feature.

*(Uint32*) 0x20C00008 |= 0x80000000; //Disable synchronous mode feature

When the synchronous mode is disabled, EMIF16 will not issue any refresh commands. This will no
longer result in stall cycles between asynchronous accesses and thus the performance will be improved.

This bit affects only the refreshes issued by EMIF16. It does not affect the rest of the device.