x2APIC & MSR

x2APIC & MSR

+-------------------------+    |
+-----------+      |  +-------------+        | <--+-----> vcpu 0
| IDT table |  <---+--|IDTR Register|   C    |    |        ...
+-----------+      |  +-------------+   P    |    |
^|           |         |          U    |    |      +-----------+
||           |  +-------------+        |    |      | IDT table |
||           |  |  Local APIC |        |    |      +-----------+
||           |  +------+------+        | <--+>
||           +---------+---------------+    |      +---------------+
||                     |                    |      | virtual LAPIC |
|v              +-------------+             |      +---------------+
interrupt ------>  |  IO APIC    |             |      |
+-------------+             |      |
===================================================|======|=====================
Host Mode                         |      |
+-------------------------------------------------------------+
|- guest's virtual LAPIC represented as MMIO memory region
|- guest access its LAPIC will trigger a VM-Exit on x1APIC
|- when guest uses x2APIC, host trap LAPIC access through MSR bitmap.
|  In the x2APIC mode, host will maintain a MSR bitmap, which contains the info that
|  which MSRs is allowed to access directly by a guest and others are sensitive ones.
|  When guest accesses the sentitive MSRs, execution still exits to the host.

xAPIC模式下，APIC寄存器被映射到一段4K的内存。

x2APIC模式下，一段MSR地址区间被保留用作APIC寄存器访问。MSR的这些项可以通过bitmap配置来指示guest可否直接访问某项（访问某项时是否产生VM Exit）

Reference:

Abel Gordon,"ELI: Bare-Metal Performance for I/O Virtualization"