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2012-12-19 21:12
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arch\arm\mach-s3c2440\mach-xxx2440.c
arch\arm\plat-s3c24xx\devs.c
/* linux/arch/arm/mach-s3c2440/mach-utu2440.c
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/list.h>
#include <linux/timer.h>
#include <linux/init.h>
#include <linux/sysdev.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <asm/plat-s3c/regs-serial.h>
#include <asm/arch/regs-gpio.h>
#include <asm/arch/regs-lcd.h>
#include <asm/arch/udc.h>
#include <asm/arch/idle.h>
#include <asm/arch/fb.h>
#include <asm/arch/ts.h>
#include <asm/arch/lcd.h>
#include <asm/arch/map.h>
#include <asm/plat-s3c24xx/s3c2410.h>
#include <asm/plat-s3c24xx/s3c2440.h>
#include <asm/plat-s3c24xx/clock.h>
#include <asm/plat-s3c24xx/devs.h>
#include <asm/plat-s3c24xx/cpu.h>
#include <asm/plat-s3c/nand.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>
static struct map_desc utu2440_iodesc[] __initdata = {
[0] = {
.virtual = (unsigned long)S3C24XX_VA_DM9000,
.pfn = __phys_to_pfn(S3C24XX_PA_DM9000),
.length = SZ_1M,
.type = MT_DEVICE,
},
[1] = {
.virtual = (unsigned long)S3C24XX_VA_IIS,
.pfn = __phys_to_pfn(S3C2410_PA_IIS),
.length = S3C24XX_SZ_IIS,
.type = MT_DEVICE
},
};
#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
static struct s3c2410_uartcfg utu2440_uartcfgs[] __initdata = {
[0] = {
.hwport = 0,
.flags = 0,
.ucon = 0x3c5,
.ulcon = 0x03,
.ufcon = 0x51,
},
[1] = {
.hwport = 1,
.flags = 0,
.ucon = 0x3c5,
.ulcon = 0x03,
.ufcon = 0x51,
},
[2] = {
.hwport = 2,
.flags = 0,
.ucon = 0x3c5,
.ulcon = 0x03,
.ufcon = 0x51,
}
#ifdef IR_PORT
/* IR port */
[2] = {
.hwport = 2,
.flags = 0,
.uart_flags = 0,
.ucon = 0x3c5,
.ulcon = 0x43,
.ufcon = 0x51,
}
#endif
};
static void utu2440_udc_pullup(enum s3c2410_udc_cmd_e cmd)
{
printk(KERN_DEBUG "udc: pullup(%d)\n",cmd);
switch (cmd)
{
case S3C2410_UDC_P_ENABLE :
//not realsized
break;
case S3C2410_UDC_P_DISABLE :
//not realsized
break;
case S3C2410_UDC_P_RESET :
break;
default:
break;
}
}
static struct s3c2410_udc_mach_info utu2440_udc_cfg __initdata = {
.udc_command = utu2440_udc_pullup,
.vbus_pin = S3C2410_GPG5,
.vbus_pin_inverted = 1,
};
/* For Sumsang 4.3 Touch screen */
static struct s3c2410_ts_mach_info utu2440_ts_cfg __initdata = {
.delay = 10000,
.presc = 49,
.oversampling_shift = 2,
};
#if defined(CONFIG_FB_S3C2410_YCLCD_T35A)
static struct s3c2410fb_display utu2440_lcdcfg __initdata = {
.lcdcon5= S3C2410_LCDCON5_FRM565 | \
S3C2410_LCDCON5_INVVLINE | \
S3C2410_LCDCON5_INVVFRAME | \
S3C2410_LCDCON5_PWREN | \
S3C2410_LCDCON5_HWSWP,
.type = S3C2410_LCDCON1_TFT,
.width = 320,
.height = 240,
.pixclock = 160000,
.xres = 320,
.yres = 240,
.bpp = 16,
.left_margin = 16,
.right_margin = 6,
.hsync_len = 9,
.upper_margin = 4,
.lower_margin = 6,
.vsync_len = 16,
};
static struct s3c2410fb_mach_info utu2440_fb_info __initdata = {
.displays = &utu2440_lcdcfg,
.num_displays = 1,
.default_display = 0,
.lpcsel= 0xf82,
.gpccon= 0xaa955699,
.gpccon_mask= 0xffc003cc,
.gpcup= 0x0000ffff,
.gpcup_mask= 0xffffffff,
.gpdcon = 0xaa95aaa1,
.gpdcon_mask = 0xffc0fff0,
.gpdup = 0x0000faff,
.gpdup_mask = 0xffffffff,
};
#endif
#if defined(CONFIG_FB_S3C2410_YCLCD_T35B)
static struct s3c2410fb_display utu2440_lcdcfg __initdata = {
.lcdcon5= S3C2410_LCDCON5_FRM565 | \
S3C2410_LCDCON5_INVVLINE | \
S3C2410_LCDCON5_INVVFRAME | \
S3C2410_LCDCON5_PWREN | \
S3C2410_LCDCON5_HWSWP,
.type = S3C2410_LCDCON1_TFT,
.width = 320,
.height = 240,
.pixclock = 160000,
.xres = 320,
.yres = 240,
.bpp = 16,
.left_margin = 1,
.right_margin = 21,
.hsync_len = 44,
.upper_margin = 4,
.lower_margin = 6,
.vsync_len = 16,
};
static struct s3c2410fb_mach_info utu2440_fb_info __initdata = {
.displays = &utu2440_lcdcfg,
.num_displays = 1,
.default_display = 0,
.lpcsel= 0xf82,
.gpccon= 0xaa955699,
.gpccon_mask= 0xffc003cc,
.gpcup= 0x0000ffff,
.gpcup_mask= 0xffffffff,
.gpdcon = 0xaa95aaa1,
.gpdcon_mask = 0xffc0fff0,
.gpdup = 0x0000faff,
.gpdup_mask = 0xffffffff,
};
#endif
#if defined(CONFIG_FB_S3C2410_YCLCD_T35C)
static struct s3c2410fb_display utu2440_lcdcfg __initdata = {
.lcdcon5= S3C2410_LCDCON5_FRM565 | \
S3C2410_LCDCON5_INVVLINE | \
S3C2410_LCDCON5_INVVFRAME | \
S3C2410_LCDCON5_PWREN | \
S3C2410_LCDCON5_HWSWP,
.type = S3C2410_LCDCON1_TFT,
.width = 240,
.height = 320,
.pixclock = 80000,
.xres = 240,
.yres = 320,
.bpp = 16,
.left_margin = 20,//reg3
.right_margin = 37,//reg3
.hsync_len = 6, /* value in pixels (TFT) or HCLKs (STN) */
.upper_margin = 2,//reg2
.lower_margin = 6,//reg2
.vsync_len = 2, /* value in lines (TFT) or 0 (STN) */
};
static struct s3c2410fb_mach_info utu2440_fb_info __initdata = {
.displays = &utu2440_lcdcfg,
.num_displays = 1,
.default_display = 0,
.lpcsel= 0xf82,
.gpccon= 0xaa955699,
.gpccon_mask= 0xffc003cc,
.gpcup= 0x0000ffff,
.gpcup_mask= 0xffffffff,
.gpdcon = 0xaa95aaa1,
.gpdcon_mask = 0xffc0fff0,
.gpdup = 0x0000faff,
.gpdup_mask = 0xffffffff,
};
#endif
#if defined(CONFIG_FB_S3C2410_YCLCD_T43A)
/* For Sumsang 4.3 LCD */
static struct s3c2410fb_display utu2440_lcdcfg __initdata = {
.lcdcon5= S3C2410_LCDCON5_FRM565 | \
S3C2410_LCDCON5_INVVLINE | \
S3C2410_LCDCON5_INVVFRAME | \
S3C2410_LCDCON5_PWREN | \
S3C2410_LCDCON5_HWSWP,
.type = S3C2410_LCDCON1_TFT,
.width = 480,
.height = 272,
.pixclock = 40000, //S3C2410_LCDCON1_CLKVAL+1 * 20000
.xres = 480,
.yres = 272,
.bpp = 16,
.left_margin = 16,
.right_margin = 6,
.hsync_len = 96,
.upper_margin = 2,
.lower_margin = 6,
.vsync_len = 10,
};
static struct s3c2410fb_mach_info utu2440_fb_info __initdata = {
.displays = &utu2440_lcdcfg,
.num_displays = 1,
.default_display = 0,
.lpcsel= 0xf82,
.gpccon= 0xaa955699,
.gpccon_mask= 0xffc003cc,
.gpcup= 0x0000ffff,
.gpcup_mask= 0xffffffff,
.gpdcon = 0xaa95aaa1,
.gpdcon_mask = 0xffc0fff0,
.gpdup = 0x0000faff,
.gpdup_mask = 0xffffffff,
};
#endif
#if defined(CONFIG_FB_S3C2410_YCLCD_T70A)
static struct s3c2410fb_display utu2440_lcdcfg __initdata = {
.lcdcon5= S3C2410_LCDCON5_FRM565 | \
S3C2410_LCDCON5_INVVLINE | \
S3C2410_LCDCON5_INVVFRAME | \
S3C2410_LCDCON5_PWREN | \
S3C2410_LCDCON5_HWSWP,
.type = S3C2410_LCDCON1_TFT,
.width = 800,
.height = 480,
.pixclock = 40000,
.xres = 800,
.yres = 480,
.bpp = 16,
.left_margin = 16,
.right_margin = 48,
.hsync_len = 96,
.upper_margin = 6,
.lower_margin = 10,
.vsync_len = 2,
};
static struct s3c2410fb_mach_info utu2440_fb_info __initdata = {
.displays = &utu2440_lcdcfg,
.num_displays = 1,
.default_display = 0,
.lpcsel= 0xf82,
.gpccon= 0xaa955699,
.gpccon_mask= 0xffc003cc,
.gpcup= 0x0000ffff,
.gpcup_mask= 0xffffffff,
.gpdcon = 0xaa95aaa1,
.gpdcon_mask = 0xffc0fff0,
.gpdup = 0x0000faff,
.gpdup_mask = 0xffffffff,
};
#endif
#if defined(CONFIG_FB_S3C2410_YCLCD_T70B)
static struct s3c2410fb_display utu2440_lcdcfg __initdata = {
.lcdcon5= S3C2410_LCDCON5_FRM565 | \
S3C2410_LCDCON5_INVVLINE | \
S3C2410_LCDCON5_INVVFRAME | \
S3C2410_LCDCON5_PWREN | \
S3C2410_LCDCON5_HWSWP,
.type = S3C2410_LCDCON1_TFT,
.width = 800,
.height = 480,
.pixclock = 40000,
.xres = 800,
.yres = 480,
.bpp = 16,
.left_margin = 16,
.right_margin = 48,
.hsync_len = 96,
.upper_margin = 6,
.lower_margin = 10,
.vsync_len = 2,
};
static struct s3c2410fb_mach_info utu2440_fb_info __initdata = {
.displays = &utu2440_lcdcfg,
.num_displays = 1,
.default_display = 0,
.lpcsel= 0xf82,
.gpccon= 0xaa955699,
.gpccon_mask= 0xffc003cc,
.gpcup= 0x0000ffff,
.gpcup_mask= 0xffffffff,
.gpdcon = 0xaa95aaa1,
.gpdcon_mask = 0xffc0fff0,
.gpdup = 0x0000faff,
.gpdup_mask = 0xffffffff,
};
#endif
#if defined(CONFIG_FB_S3C2410_YCLCD_T56A)
static struct s3c2410fb_display utu2440_lcdcfg __initdata = {
.lcdcon5= S3C2410_LCDCON5_FRM565 | \
S3C2410_LCDCON5_INVVLINE | \
S3C2410_LCDCON5_INVVFRAME | \
S3C2410_LCDCON5_PWREN | \
S3C2410_LCDCON5_HWSWP,
.type = S3C2410_LCDCON1_TFT,
.width = 640,
.height = 480,
.pixclock = 40000,
.xres = 640,
.yres = 480,
.bpp = 16,
.left_margin = 16,
.right_margin = 48,
.hsync_len = 96,
.upper_margin = 33,
.lower_margin = 10,
.vsync_len = 2,
};
static struct s3c2410fb_mach_info utu2440_fb_info __initdata = {
.displays = &utu2440_lcdcfg,
.num_displays = 1,
.default_display = 0,
.lpcsel= 0xf82,
.gpccon= 0xaa955699,
.gpccon_mask= 0xffc003cc,
.gpcup= 0x0000ffff,
.gpcup_mask= 0xffffffff,
.gpdcon = 0xaa95aaa1,
.gpdcon_mask = 0xffc0fff0,
.gpdup = 0x0000faff,
.gpdup_mask = 0xffffffff,
};
#endif
#if defined(CONFIG_FB_S3C2410_YCLCD_T104A)
static struct s3c2410fb_display utu2440_lcdcfg __initdata = {
.lcdcon5= S3C2410_LCDCON5_FRM565 | \
S3C2410_LCDCON5_INVVLINE | \
S3C2410_LCDCON5_INVVFRAME | \
S3C2410_LCDCON5_PWREN | \
S3C2410_LCDCON5_HWSWP,
.type = S3C2410_LCDCON1_TFT,
.width = 640,
.height = 480,
.pixclock = 40000,
.xres = 640,
.yres = 480,
.bpp = 16,
.left_margin = 16,
.right_margin = 48,
.hsync_len = 96,
.upper_margin = 33,
.lower_margin = 10,
.vsync_len = 2,
};
static struct s3c2410fb_mach_info utu2440_fb_info __initdata = {
.displays = &utu2440_lcdcfg,
.num_displays = 1,
.default_display = 0,
.lpcsel= 0xf82,
.gpccon= 0xaa955699,
.gpccon_mask= 0xffc003cc,
.gpcup= 0x0000ffff,
.gpcup_mask= 0xffffffff,
.gpdcon = 0xaa95aaa1,
.gpdcon_mask = 0xffc0fff0,
.gpdup = 0x0000faff,
.gpdup_mask = 0xffffffff,
};
#endif
#if defined(CONFIG_FB_S3C2410_480X290)
static struct s3c2410fb_display utu2440_lcdcfg __initdata = {
.lcdcon5= S3C2410_LCDCON5_FRM565 | \
S3C2410_LCDCON5_INVVLINE | \
S3C2410_LCDCON5_INVVFRAME | \
S3C2410_LCDCON5_PWREN | \
S3C2410_LCDCON5_HWSWP,
.type = S3C2410_LCDCON1_TFT,
.width = 480,
.height = 290,
.pixclock = 40000,
.xres = 480,
.yres = 290,
.bpp = 16,
.left_margin = 16,
.right_margin = 48,
.hsync_len = 96,
.upper_margin = 33,
.lower_margin = 10,
.vsync_len = 2,
};
static struct s3c2410fb_mach_info utu2440_fb_info __initdata = {
.displays = &utu2440_lcdcfg,
.num_displays = 1,
.default_display = 0,
.lpcsel= 0xf82,
.gpccon= 0xaa955699,
.gpccon_mask= 0xffc003cc,
.gpcup= 0x0000ffff,
.gpcup_mask= 0xffffffff,
.gpdcon = 0xaa95aaa1,
.gpdcon_mask = 0xffc0fff0,
.gpdup = 0x0000faff,
.gpdup_mask = 0xffffffff,
};
#endif
/* ---------------------------------------------------
* This is used for add your own devices here
----------------------------------------------------*/
/* Nand Flash board */
static int chip0_map[] = { 0 };
struct mtd_partition bit_default_nand_part[] = {
[0] = {
.name = "bootloader",
.offset = 0x00000000,
.size = 0x00060000,
},
[1] = {
.name = "kernel",
.offset = 0x00060000,
.size = 0x00200000,
},
[2] = {
.name = "root",
.offset = 0x00260000,
.size = 0x3d9c000,
},
};
/* the bit has 1 selectable slots for nand-flash, the three
* on-board chip areas, as well as the external SmartMedia
* slot.
*
* Note, there is no current hot-plug support for the SmartMedia
* socket.
*/
static struct s3c2410_nand_set bit_nand_sets[] = {
[0] = {
.name = "chip0",
.nr_chips = 1,
.nr_map = chip0_map,
.nr_partitions = ARRAY_SIZE(bit_default_nand_part),
.partitions = bit_default_nand_part
},
};
static struct s3c2410_platform_nand bit_nand_info = {
.tacls = 0,
.twrph0 = 30,
.twrph1 = 0,
.nr_sets = ARRAY_SIZE(bit_nand_sets),
.sets = bit_nand_sets,
};
/* Register Platform Devices structure */
static struct platform_device *utu2440_devices[] __initdata = {
&s3c_device_usb,
&s3c_device_lcd,
&s3c_device_wdt,
&s3c_device_i2c,
&s3c_device_iis,
&s3c_device_usbgadget,
&s3c_device_ts,
&s3c_device_dm9000,
&s3c_device_nand,
&s3c_device_sound,
&s3c_device_buttons,
&s3c_device_rtc,
&s3c_device_sdi,
};
static struct s3c24xx_board utu2440_board __initdata={
.devices = utu2440_devices,
.devices_count = ARRAY_SIZE(utu2440_devices)
};
static void __init utu2440_map_io(void)
{ //function defined in cpu.c
s3c24xx_init_io(utu2440_iodesc, ARRAY_SIZE(utu2440_iodesc));
s3c24xx_init_clocks(12000000); //CPU clock 12Mhz
s3c24xx_init_uarts(utu2440_uartcfgs, ARRAY_SIZE(utu2440_uartcfgs));
s3c24xx_set_board(&utu2440_board);
}
static void __init utu2440_init_irq(void)
{
s3c24xx_init_irq();
}
static void __init utu2440_init(void)
{
s3c24xx_fb_set_platdata(&utu2440_fb_info);
s3c24xx_udc_set_platdata(&utu2440_udc_cfg);
s3c24xx_ts_set_platdata(&utu2440_ts_cfg);
/* Turn off suspend on both USB ports, and switch the
* selectable USB port to USB device mode. */
s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST |
S3C2410_MISCCR_USBSUSPND0 |
S3C2410_MISCCR_USBSUSPND1, 0x0);
/* This is different from lagency kernel packs */
platform_add_devices(utu2440_devices, ARRAY_SIZE(utu2440_devices));
//register devices list in the devices.c file
s3c2410_gpio_cfgpin(S3C2410_GPF4, S3C2410_GPF4_OUTP);
s3c2410_gpio_cfgpin(S3C2410_GPF5, S3C2410_GPF5_OUTP);
s3c2410_gpio_cfgpin(S3C2410_GPF6, S3C2410_GPF6_OUTP);
s3c2410_gpio_cfgpin(S3C2410_GPF7, S3C2410_GPF7_OUTP);
s3c2410_gpio_setpin(S3C2410_GPF4, 0);
s3c2410_gpio_setpin(S3C2410_GPF5, 0);
s3c2410_gpio_setpin(S3C2410_GPF6, 0);
s3c2410_gpio_setpin(S3C2410_GPF7, 0);
s3c2410_gpio_cfgpin(S3C2410_GPB4, S3C2410_GPB4_OUTP);
s3c2410_gpio_setpin(S3C2410_GPB4, 1);
s3c_device_nand.dev.platform_data = &bit_nand_info;
}
//machine_desc struct
MACHINE_START(UTU2440, "UTU2440") //the first is defined as MACH_TYPE_UTU2440 and the second
//parameter is defined as the machine name as in mach-types
.phys_io = S3C2410_PA_UART,
.io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
.boot_params = S3C2410_SDRAM_PA + 0x100,
.map_io = utu2440_map_io, //used in cpu.c
.init_irq = utu2440_init_irq, //used in cpu.c
.init_machine = utu2440_init, //used in cpu.c
.timer = &s3c24xx_timer,
MACHINE_ENDarch\arm\plat-s3c24xx\devs.c
/* linux/arch/arm/plat-s3c24xx/devs.c
*
* Copyright (c) 2004 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* Base S3C24XX platform device definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/list.h>
#include <linux/timer.h>
#include <linux/init.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
#include <linux/dm9000.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/arch/fb.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/arch/ts.h>
#include <asm/plat-s3c/regs-serial.h>
#include <asm/plat-s3c24xx/udc.h>
#include <asm/plat-s3c24xx/devs.h>
#include <asm/plat-s3c24xx/cpu.h>
#include <asm/plat-s3c24xx/regs-spi.h>
/* Serial port registrations */
static struct resource s3c2410_uart0_resource[] = {
[0] = {
.start = S3C2410_PA_UART0,
.end = S3C2410_PA_UART0 + 0x3fff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_S3CUART_RX0,
.end = IRQ_S3CUART_ERR0,
.flags = IORESOURCE_IRQ,
}
};
static struct resource s3c2410_uart1_resource[] = {
[0] = {
.start = S3C2410_PA_UART1,
.end = S3C2410_PA_UART1 + 0x3fff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_S3CUART_RX1,
.end = IRQ_S3CUART_ERR1,
.flags = IORESOURCE_IRQ,
}
};
static struct resource s3c2410_uart2_resource[] = {
[0] = {
.start = S3C2410_PA_UART2,
.end = S3C2410_PA_UART2 + 0x3fff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_S3CUART_RX2,
.end = IRQ_S3CUART_ERR2,
.flags = IORESOURCE_IRQ,
}
};
struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
[0] = {
.resources = s3c2410_uart0_resource,
.nr_resources = ARRAY_SIZE(s3c2410_uart0_resource),
},
[1] = {
.resources = s3c2410_uart1_resource,
.nr_resources = ARRAY_SIZE(s3c2410_uart1_resource),
},
[2] = {
.resources = s3c2410_uart2_resource,
.nr_resources = ARRAY_SIZE(s3c2410_uart2_resource),
},
};
/* yart devices */
static struct platform_device s3c24xx_uart_device0 = {
.id = 0,
};
static struct platform_device s3c24xx_uart_device1 = {
.id = 1,
};
static struct platform_device s3c24xx_uart_device2 = {
.id = 2,
};
struct platform_device *s3c24xx_uart_src[3] = {
&s3c24xx_uart_device0,
&s3c24xx_uart_device1,
&s3c24xx_uart_device2,
};
struct platform_device *s3c24xx_uart_devs[3] = {
};
/* USB Host Controller */
static struct resource s3c_usb_resource[] = {
[0] = {
.start = S3C24XX_PA_USBHOST,
.end = S3C24XX_PA_USBHOST + S3C24XX_SZ_USBHOST - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_USBH,
.end = IRQ_USBH,
.flags = IORESOURCE_IRQ,
}
};
static u64 s3c_device_usb_dmamask = 0xffffffffUL;
struct platform_device s3c_device_usb = {
.name = "s3c2410-ohci",
.id = -1,
.num_resources = ARRAY_SIZE(s3c_usb_resource),
.resource = s3c_usb_resource,
.dev = {
.dma_mask = &s3c_device_usb_dmamask,
.coherent_dma_mask = 0xffffffffUL
}
};
EXPORT_SYMBOL(s3c_device_usb);
/* LCD Controller */
static struct resource s3c_lcd_resource[] = {
[0] = {
.start = S3C24XX_PA_LCD,
.end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_LCD,
.end = IRQ_LCD,
.flags = IORESOURCE_IRQ,
}
};
static u64 s3c_device_lcd_dmamask = 0xffffffffUL;
struct platform_device s3c_device_lcd = {
.name = "s3c2410-lcd",
.id = -1,
.num_resources = ARRAY_SIZE(s3c_lcd_resource),
.resource = s3c_lcd_resource,
.dev = {
.dma_mask = &s3c_device_lcd_dmamask,
.coherent_dma_mask = 0xffffffffUL
}
};
EXPORT_SYMBOL(s3c_device_lcd);
void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
{
struct s3c2410fb_mach_info *npd;
npd = kmalloc(sizeof(*npd), GFP_KERNEL);
if (npd) {
memcpy(npd, pd, sizeof(*npd));
s3c_device_lcd.dev.platform_data = npd;
} else {
printk(KERN_ERR "no memory for LCD platform data\n");
}
}
/* Touchscreen */
struct platform_device s3c_device_ts = {
.name = "s3c2410-ts",
.id = -1,
};
EXPORT_SYMBOL(s3c_device_ts);
static struct s3c2410_ts_mach_info s3c2410ts_info;
void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
{
memcpy(&s3c2410ts_info,hard_s3c2410ts_info,sizeof(struct s3c2410_ts_mach_info));
s3c_device_ts.dev.platform_data = &s3c2410ts_info;
}
/* Sound */
struct platform_device s3c_device_sound = {
.name = "s3c2440-sound",
.id = -1,
};
EXPORT_SYMBOL(s3c_device_sound);
struct platform_device s3c_device_buttons = {
.name = "s3c2410-buttons",
.id = -1,
};
EXPORT_SYMBOL(s3c_device_buttons);
/* DM9000 Net Card */
static struct resource s3c_dm9000_resource[] = {
[0] = {
.start = S3C24XX_PA_DM9000,
.end = S3C24XX_PA_DM9000+ 0x3,
.flags = IORESOURCE_MEM
},
[1]={
.start = S3C24XX_PA_DM9000 + 0x4, //CMD pin is A2
.end = S3C24XX_PA_DM9000 + 0x4 + 0x7c,
.flags = IORESOURCE_MEM
},
[2] = {
.start = IRQ_EINT9,
.end = IRQ_EINT9,
.flags = IORESOURCE_IRQ
},
};
static struct dm9000_plat_data s3c_device_dm9000_platdata = {
.flags= DM9000_PLATF_16BITONLY,
};
struct platform_device s3c_device_dm9000 = {
.name= "dm9000",
.id= 0,
.num_resources= ARRAY_SIZE(s3c_dm9000_resource),
.resource= s3c_dm9000_resource,
.dev= {
.platform_data = &s3c_device_dm9000_platdata,
}
};
EXPORT_SYMBOL(s3c_device_dm9000);
/* NAND Controller */
static struct resource s3c_nand_resource[] = {
[0] = {
.start = S3C2410_PA_NAND,
.end = S3C2410_PA_NAND + S3C24XX_SZ_NAND - 1,
.flags = IORESOURCE_MEM,
}
};
struct platform_device s3c_device_nand = {
.name = "s3c2410-nand",
.id = -1,
.num_resources = ARRAY_SIZE(s3c_nand_resource),
.resource = s3c_nand_resource,
};
EXPORT_SYMBOL(s3c_device_nand);
/* USB Device (Gadget)*/
static struct resource s3c_usbgadget_resource[] = {
[0] = {
.start = S3C24XX_PA_USBDEV,
.end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_USBD,
.end = IRQ_USBD,
.flags = IORESOURCE_IRQ,
}
};
struct platform_device s3c_device_usbgadget = {
.name = "s3c2410-usbgadget",
.id = -1,
.num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
.resource = s3c_usbgadget_resource,
};
EXPORT_SYMBOL(s3c_device_usbgadget);
void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
{
struct s3c2410_udc_mach_info *npd;
npd = kmalloc(sizeof(*npd), GFP_KERNEL);
if (npd) {
memcpy(npd, pd, sizeof(*npd));
s3c_device_usbgadget.dev.platform_data = npd;
} else {
printk(KERN_ERR "no memory for udc platform data\n");
}
}
/* Watchdog */
static struct resource s3c_wdt_resource[] = {
[0] = {
.start = S3C24XX_PA_WATCHDOG,
.end = S3C24XX_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_WDT,
.end = IRQ_WDT,
.flags = IORESOURCE_IRQ,
}
};
struct platform_device s3c_device_wdt = {
.name = "s3c2410-wdt",
.id = -1,
.num_resources = ARRAY_SIZE(s3c_wdt_resource),
.resource = s3c_wdt_resource,
};
EXPORT_SYMBOL(s3c_device_wdt);
/* I2C */
static struct resource s3c_i2c_resource[] = {
[0] = {
.start = S3C24XX_PA_IIC,
.end = S3C24XX_PA_IIC + S3C24XX_SZ_IIC - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_IIC,
.end = IRQ_IIC,
.flags = IORESOURCE_IRQ,
}
};
struct platform_device s3c_device_i2c = {
.name = "s3c2410-i2c",
.id = -1,
.num_resources = ARRAY_SIZE(s3c_i2c_resource),
.resource = s3c_i2c_resource,
};
EXPORT_SYMBOL(s3c_device_i2c);
/* IIS */
static struct resource s3c_iis_resource[] = {
[0] = {
.start = S3C24XX_PA_IIS,
.end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1,
.flags = IORESOURCE_MEM,
}
};
static u64 s3c_device_iis_dmamask = 0xffffffffUL;
struct platform_device s3c_device_iis = {
.name = "s3c2410-iis",
.id = -1,
.num_resources = ARRAY_SIZE(s3c_iis_resource),
.resource = s3c_iis_resource,
.dev = {
.dma_mask = &s3c_device_iis_dmamask,
.coherent_dma_mask = 0xffffffffUL
}
};
EXPORT_SYMBOL(s3c_device_iis);
/* RTC */
static struct resource s3c_rtc_resource[] = {
[0] = {
.start = S3C24XX_PA_RTC,
.end = S3C24XX_PA_RTC + 0xff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_RTC,
.end = IRQ_RTC,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = IRQ_TICK,
.end = IRQ_TICK,
.flags = IORESOURCE_IRQ
}
};
struct platform_device s3c_device_rtc = {
.name = "s3c2410-rtc",
.id = -1,
.num_resources = ARRAY_SIZE(s3c_rtc_resource),
.resource = s3c_rtc_resource,
};
EXPORT_SYMBOL(s3c_device_rtc);
/* ADC */
static struct resource s3c_adc_resource[] = {
[0] = {
.start = S3C24XX_PA_ADC,
.end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_TC,
.end = IRQ_TC,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = IRQ_ADC,
.end = IRQ_ADC,
.flags = IORESOURCE_IRQ,
}
};
struct platform_device s3c_device_adc = {
.name = "s3c2410-adc",
.id = -1,
.num_resources = ARRAY_SIZE(s3c_adc_resource),
.resource = s3c_adc_resource,
};
/* SDI */
static struct resource s3c_sdi_resource[] = {
[0] = {
.start = S3C2410_PA_SDI,
.end = S3C2410_PA_SDI + S3C24XX_SZ_SDI - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_SDI,
.end = IRQ_SDI,
.flags = IORESOURCE_IRQ,
}
};
struct platform_device s3c_device_sdi = {
.name = "s3c2410-sdi",
.id = -1,
.num_resources = ARRAY_SIZE(s3c_sdi_resource),
.resource = s3c_sdi_resource,
};
EXPORT_SYMBOL(s3c_device_sdi);
/* High-speed MMC/SD */
static struct resource s3c_hsmmc_resource[] = {
[0] = {
.start = S3C2443_PA_HSMMC,
.end = S3C2443_PA_HSMMC + S3C2443_SZ_HSMMC - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_S3C2443_HSMMC,
.end = IRQ_S3C2443_HSMMC,
.flags = IORESOURCE_IRQ,
}
};
static u64 s3c_device_hsmmc_dmamask = 0xffffffffUL;
struct platform_device s3c_device_hsmmc = {
.name = "s3c-sdhci",
.id = -1,
.num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
.resource = s3c_hsmmc_resource,
.dev = {
.dma_mask = &s3c_device_hsmmc_dmamask,
.coherent_dma_mask = 0xffffffffUL
}
};
/* SPI (0) */
static struct resource s3c_spi0_resource[] = {
[0] = {
.start = S3C24XX_PA_SPI,
.end = S3C24XX_PA_SPI + 0x1f,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_SPI0,
.end = IRQ_SPI0,
.flags = IORESOURCE_IRQ,
}
};
static u64 s3c_device_spi0_dmamask = 0xffffffffUL;
struct platform_device s3c_device_spi0 = {
.name = "s3c2410-spi",
.id = 0,
.num_resources = ARRAY_SIZE(s3c_spi0_resource),
.resource = s3c_spi0_resource,
.dev = {
.dma_mask = &s3c_device_spi0_dmamask,
.coherent_dma_mask = 0xffffffffUL
}
};
EXPORT_SYMBOL(s3c_device_spi0);
/* SPI (1) */
static struct resource s3c_spi1_resource[] = {
[0] = {
.start = S3C24XX_PA_SPI + S3C2410_SPI1,
.end = S3C24XX_PA_SPI + S3C2410_SPI1 + 0x1f,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_SPI1,
.end = IRQ_SPI1,
.flags = IORESOURCE_IRQ,
}
};
static u64 s3c_device_spi1_dmamask = 0xffffffffUL;
struct platform_device s3c_device_spi1 = {
.name = "s3c2410-spi",
.id = 1,
.num_resources = ARRAY_SIZE(s3c_spi1_resource),
.resource = s3c_spi1_resource,
.dev = {
.dma_mask = &s3c_device_spi1_dmamask,
.coherent_dma_mask = 0xffffffffUL
}
};
EXPORT_SYMBOL(s3c_device_spi1);
/* pwm timer blocks */
static struct resource s3c_timer0_resource[] = {
[0] = {
.start = S3C24XX_PA_TIMER + 0x0C,
.end = S3C24XX_PA_TIMER + 0x0C + 0xB,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_TIMER0,
.end = IRQ_TIMER0,
.flags = IORESOURCE_IRQ,
}
};
struct platform_device s3c_device_timer0 = {
.name = "s3c2410-timer",
.id = 0,
.num_resources = ARRAY_SIZE(s3c_timer0_resource),
.resource = s3c_timer0_resource,
};
EXPORT_SYMBOL(s3c_device_timer0);
/* timer 1 */
static struct resource s3c_timer1_resource[] = {
[0] = {
.start = S3C24XX_PA_TIMER + 0x18,
.end = S3C24XX_PA_TIMER + 0x23,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_TIMER1,
.end = IRQ_TIMER1,
.flags = IORESOURCE_IRQ,
}
};
struct platform_device s3c_device_timer1 = {
.name = "s3c2410-timer",
.id = 1,
.num_resources = ARRAY_SIZE(s3c_timer1_resource),
.resource = s3c_timer1_resource,
};
EXPORT_SYMBOL(s3c_device_timer1);
/* timer 2 */
static struct resource s3c_timer2_resource[] = {
[0] = {
.start = S3C24XX_PA_TIMER + 0x24,
.end = S3C24XX_PA_TIMER + 0x2F,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_TIMER2,
.end = IRQ_TIMER2,
.flags = IORESOURCE_IRQ,
}
};
struct platform_device s3c_device_timer2 = {
.name = "s3c2410-timer",
.id = 2,
.num_resources = ARRAY_SIZE(s3c_timer2_resource),
.resource = s3c_timer2_resource,
};
EXPORT_SYMBOL(s3c_device_timer2);
/* timer 3 */
static struct resource s3c_timer3_resource[] = {
[0] = {
.start = S3C24XX_PA_TIMER + 0x30,
.end = S3C24XX_PA_TIMER + 0x3B,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_TIMER3,
.end = IRQ_TIMER3,
.flags = IORESOURCE_IRQ,
}
};
struct platform_device s3c_device_timer3 = {
.name = "s3c2410-timer",
.id = 3,
.num_resources = ARRAY_SIZE(s3c_timer3_resource),
.resource = s3c_timer3_resource,
};
EXPORT_SYMBOL(s3c_device_timer3);
#ifdef CONFIG_CPU_S3C2440
/* Camif Controller */
static struct resource s3c_camif_resource[] = {
[0] = {
.start = S3C2440_PA_CAMIF,
.end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_CAM,
.end = IRQ_CAM,
.flags = IORESOURCE_IRQ,
}
};
static u64 s3c_device_camif_dmamask = 0xffffffffUL;
struct platform_device s3c_device_camif = {
.name = "s3c2440-camif",
.id = -1,
.num_resources = ARRAY_SIZE(s3c_camif_resource),
.resource = s3c_camif_resource,
.dev = {
.dma_mask = &s3c_device_camif_dmamask,
.coherent_dma_mask = 0xffffffffUL
}
};
EXPORT_SYMBOL(s3c_device_camif);
#endif // CONFIG_CPU_S3C2440
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