gem5 运行测试程序时如何设置cache的大小

L1,L2,L3cachesizesnotbeingused?

Payne,Benjamin<bpayne<at>lps.umd.edu>

2012-11-0119:36:18GMT

Hello,Iamrunninggem5insyscallemulationmodeandspecifyingthecachesizes.Thisappearstoworkasdesired.bpayne<at>bpayne-VirtualBox64:~/gem5$build/X86/gem5.optconfigs/example/se.py--clock=2.8GHz--l1d_size=32K
--l1i_size=32K--l2_size=256K--l3_size=8192K-ctests/test-progs/hello/bin/x86/linux/hellogem5SimulatorSystem.



这句话的大体意思是，gem5在运行测试程序时，虽然通过参数设置了L1，L2，L3的大小，但是L1，L2，L3没有被用到

Re:L1,L2,L3cachesizesnotbeingused?

AndreasHansson<Andreas.Hansson<at>arm.com>

2012-11-0119:43:38GMT

Youseemtoberunningwithoutcaches.

Try--cachesand--l2cache

回复的解决方法是，L1cache前加上“--caches”，在l2cache前加上“--l2cache“

按照此种方法，我在我的机器上测试,命令如下：

build/X86/gem5.optconfigs/example/se.py--caches--l1d_size=32kB--l1i_size=32kB--l2cache--l2_size=256kB--l3_size=8192kB-ctests/test-progs/hello/bin/x86/linux/hello

查看./m5out/stats.txt,运行结果如下：

----------BeginSimulationStatistics----------
sim_seconds0.000006#Numberofsecondssimulated
sim_ticks5950500#Numberoftickssimulated
final_tick5950500#Numberofticksfrombeginningofsimulation(restoredfromcheckpointsandneverreset)
sim_freq1000000000000#Frequencyofsimulatedticks
host_inst_rate493559#Simulatorinstructionrate(inst/s)
host_op_rate889540#Simulatorop(includingmicroops)rate(op/s)
host_tick_rate511707881#Simulatortickrate(ticks/s)
host_mem_usage621232#Numberofbytesofhostmemoryused
host_seconds0.01#Realtimeelapsedonthehost
sim_insts5721#Numberofinstructionssimulated
sim_ops10328#Numberofops(includingmicroops)simulated
system.physmem.bytes_read::cpu.inst14656#Numberofbytesreadfromthismemory
system.physmem.bytes_read::cpu.data8640#Numberofbytesreadfromthismemory
system.physmem.bytes_read::total23296#Numberofbytesreadfromthismemory
system.physmem.bytes_inst_read::cpu.inst14656#Numberofinstructionsbytesreadfromthismemory
system.physmem.bytes_inst_read::total14656#Numberofinstructionsbytesreadfromthismemory
system.physmem.num_reads::cpu.inst229#Numberofreadrequestsrespondedtobythismemory
system.physmem.num_reads::cpu.data135#Numberofreadrequestsrespondedtobythismemory
system.physmem.num_reads::total364#Numberofreadrequestsrespondedtobythismemory
system.physmem.bw_read::cpu.inst2462986304#Totalreadbandwidthfromthismemory(bytes/s)
system.physmem.bw_read::cpu.data1451978825#Totalreadbandwidthfromthismemory(bytes/s)
system.physmem.bw_read::total3914965129#Totalreadbandwidthfromthismemory(bytes/s)
system.physmem.bw_inst_read::cpu.inst2462986304#Instructionreadbandwidthfromthismemory(bytes/s)
system.physmem.bw_inst_read::total2462986304#Instructionreadbandwidthfromthismemory(bytes/s)
system.physmem.bw_total::cpu.inst2462986304#Totalbandwidthto/fromthismemory(bytes/s)
system.physmem.bw_total::cpu.data1451978825#Totalbandwidthto/fromthismemory(bytes/s)
system.physmem.bw_total::total3914965129#Totalbandwidthto/fromthismemory(bytes/s)
system.l2.replacements0#numberofreplacements
system.l2.tagsinuse144.093545#Cycleaverageoftagsinuse
system.l2.total_refs1#Totalnumberofreferencestovalidblocks.
system.l2.sampled_refs285#Samplecountofreferencestovalidblocks.
system.l2.avg_refs0.003509#Averagenumberofreferencestovalidblocks.
system.l2.warmup_cycle0#Cyclewhenthewarmuppercentagewashit.
system.l2.occ_blocks::cpu.inst113.865157#Averageoccupiedblocksperrequestor
system.l2.occ_blocks::cpu.data30.228389#Averageoccupiedblocksperrequestor
system.l2.occ_percent::cpu.inst0.027799#Averagepercentageofcacheoccupancy
system.l2.occ_percent::cpu.data0.007380#Averagepercentageofcacheoccupancy
system.l2.occ_percent::total0.035179#Averagepercentageofcacheoccupancy
system.l2.ReadReq_hits::cpu.inst1#numberofReadReqhits
system.l2.ReadReq_hits::total1#numberofReadReqhits
system.l2.demand_hits::cpu.inst1#numberofdemand(read+write)hits
system.l2.demand_hits::total1#numberofdemand(read+write)hits
system.l2.overall_hits::cpu.inst1#numberofoverallhits
system.l2.overall_hits::total1#numberofoverallhits
system.l2.ReadReq_misses::cpu.inst229#numberofReadReqmisses
system.l2.ReadReq_misses::cpu.data56#numberofReadReqmisses
system.l2.ReadReq_misses::total285#numberofReadReqmisses
system.l2.ReadExReq_misses::cpu.data79#numberofReadExReqmisses
system.l2.ReadExReq_misses::total79#numberofReadExReqmisses
system.l2.demand_misses::cpu.inst229#numberofdemand(read+write)misses
system.l2.demand_misses::cpu.data135#numberofdemand(read+write)misses
system.l2.demand_misses::total364#numberofdemand(read+write)misses
system.l2.overall_misses::cpu.inst229#numberofoverallmisses
system.l2.overall_misses::cpu.data135#numberofoverallmisses
system.l2.overall_misses::total364#numberofoverallmisses
system.l2.ReadReq_accesses::cpu.inst230#numberofReadReqaccesses(hits+misses)
system.l2.ReadReq_accesses::cpu.data56#numberofReadReqaccesses(hits+misses)
system.l2.ReadReq_accesses::total286#numberofReadReqaccesses(hits+misses)
system.l2.ReadExReq_accesses::cpu.data79#numberofReadExReqaccesses(hits+misses)
system.l2.ReadExReq_accesses::total79#numberofReadExReqaccesses(hits+misses)
system.l2.demand_accesses::cpu.inst230#numberofdemand(read+write)accesses
system.l2.demand_accesses::cpu.data135#numberofdemand(read+write)accesses
system.l2.demand_accesses::total365#numberofdemand(read+write)accesses
system.l2.overall_accesses::cpu.inst230#numberofoverall(read+write)accesses
system.l2.overall_accesses::cpu.data135#numberofoverall(read+write)accesses
system.l2.overall_accesses::total365#numberofoverall(read+write)accesses
system.l2.ReadReq_miss_rate::cpu.inst0.995652#missrateforReadReqaccesses
system.l2.ReadReq_miss_rate::cpu.data1#missrateforReadReqaccesses
system.l2.ReadReq_miss_rate::total0.996503#missrateforReadReqaccesses
system.l2.ReadExReq_miss_rate::cpu.data1#missrateforReadExReqaccesses
system.l2.ReadExReq_miss_rate::total1#missrateforReadExReqaccesses
system.l2.demand_miss_rate::cpu.inst0.995652#missratefordemandaccesses
system.l2.demand_miss_rate::cpu.data1#missratefordemandaccesses
system.l2.demand_miss_rate::total0.997260#missratefordemandaccesses
system.l2.overall_miss_rate::cpu.inst0.995652#missrateforoverallaccesses
system.l2.overall_miss_rate::cpu.data1#missrateforoverallaccesses
system.l2.overall_miss_rate::total0.997260#missrateforoverallaccesses
system.l2.blocked_cycles::no_mshrs0#numberofcyclesaccesswasblocked
system.l2.blocked_cycles::no_targets0#numberofcyclesaccesswasblocked
system.l2.blocked::no_mshrs0#numberofcyclesaccesswasblocked
system.l2.blocked::no_targets0#numberofcyclesaccesswasblocked
system.l2.avg_blocked_cycles::no_mshrsnan#averagenumberofcycleseachaccesswasblocked
system.l2.avg_blocked_cycles::no_targetsnan#averagenumberofcycleseachaccesswasblocked
system.l2.fast_writes0#numberoffastwritesperformed
system.l2.cache_copies0#numberofcachecopiesperformed
system.l2.no_allocate_misses0#Numberofmissesthatwereno-allocate
system.cpu.workload.num_syscalls11#Numberofsystemcalls
system.cpu.numCycles11902#numberofcpucyclessimulated
system.cpu.numWorkItemsStarted0#numberofworkitemsthiscpustarted
system.cpu.numWorkItemsCompleted0#numberofworkitemsthiscpucompleted
system.cpu.committedInsts5721#Numberofinstructionscommitted
system.cpu.committedOps10328#Numberofops(includingmicroops)committed
system.cpu.num_int_alu_accesses10218#Numberofintegeraluaccesses
system.cpu.num_fp_alu_accesses0#Numberoffloataluaccesses
system.cpu.num_func_calls0#numberoftimesafunctioncallorreturnoccured
system.cpu.num_conditional_control_insts987#numberofinstructionsthatareconditionalcontrols
system.cpu.num_int_insts10218#numberofintegerinstructions
system.cpu.num_fp_insts0#numberoffloatinstructions
system.cpu.num_int_register_reads31675#numberoftimestheintegerregisterswereread
system.cpu.num_int_register_writes15649#numberoftimestheintegerregisterswerewritten
system.cpu.num_fp_register_reads0#numberoftimesthefloatingregisterswereread
system.cpu.num_fp_register_writes0#numberoftimesthefloatingregisterswerewritten
system.cpu.num_mem_refs2024#numberofmemoryrefs
system.cpu.num_load_insts1084#Numberofloadinstructions
system.cpu.num_store_insts940#Numberofstoreinstructions
system.cpu.num_idle_cycles0#Numberofidlecycles
system.cpu.num_busy_cycles11902#Numberofbusycycles
system.cpu.not_idle_fraction1#Percentageofnon-idlecycles
system.cpu.idle_fraction0#Percentageofidlecycles
system.cpu.icache.replacements13#numberofreplacements
system.cpu.icache.tagsinuse108.341082#Cycleaverageoftagsinuse
system.cpu.icache.total_refs7065#Totalnumberofreferencestovalidblocks.
system.cpu.icache.sampled_refs230#Samplecountofreferencestovalidblocks.
system.cpu.icache.avg_refs30.717391#Averagenumberofreferencestovalidblocks.
system.cpu.icache.warmup_cycle0#Cyclewhenthewarmuppercentagewashit.
system.cpu.icache.occ_blocks::cpu.inst108.341082#Averageoccupiedblocksperrequestor
system.cpu.icache.occ_percent::cpu.inst0.211604#Averagepercentageofcacheoccupancy
system.cpu.icache.occ_percent::total0.211604#Averagepercentageofcacheoccupancy
system.cpu.icache.ReadReq_hits::cpu.inst7065#numberofReadReqhits
system.cpu.icache.ReadReq_hits::total7065#numberofReadReqhits
system.cpu.icache.demand_hits::cpu.inst7065#numberofdemand(read+write)hits
system.cpu.icache.demand_hits::total7065#numberofdemand(read+write)hits
system.cpu.icache.overall_hits::cpu.inst7065#numberofoverallhits
system.cpu.icache.overall_hits::total7065#numberofoverallhits
system.cpu.icache.ReadReq_misses::cpu.inst230#numberofReadReqmisses
system.cpu.icache.ReadReq_misses::total230#numberofReadReqmisses
system.cpu.icache.demand_misses::cpu.inst230#numberofdemand(read+write)misses
system.cpu.icache.demand_misses::total230#numberofdemand(read+write)misses
system.cpu.icache.overall_misses::cpu.inst230#numberofoverallmisses
system.cpu.icache.overall_misses::total230#numberofoverallmisses
system.cpu.icache.ReadReq_accesses::cpu.inst7295#numberofReadReqaccesses(hits+misses)
system.cpu.icache.ReadReq_accesses::total7295#numberofReadReqaccesses(hits+misses)
system.cpu.icache.demand_accesses::cpu.inst7295#numberofdemand(read+write)accesses
system.cpu.icache.demand_accesses::total7295#numberofdemand(read+write)accesses
system.cpu.icache.overall_accesses::cpu.inst7295#numberofoverall(read+write)accesses
system.cpu.icache.overall_accesses::total7295#numberofoverall(read+write)accesses
system.cpu.icache.ReadReq_miss_rate::cpu.inst0.031528#missrateforReadReqaccesses
system.cpu.icache.ReadReq_miss_rate::total0.031528#missrateforReadReqaccesses
system.cpu.icache.demand_miss_rate::cpu.inst0.031528#missratefordemandaccesses
system.cpu.icache.demand_miss_rate::total0.031528#missratefordemandaccesses
system.cpu.icache.overall_miss_rate::cpu.inst0.031528#missrateforoverallaccesses
system.cpu.icache.overall_miss_rate::total0.031528#missrateforoverallaccesses
system.cpu.icache.blocked_cycles::no_mshrs0#numberofcyclesaccesswasblocked
system.cpu.icache.blocked_cycles::no_targets0#numberofcyclesaccesswasblocked
system.cpu.icache.blocked::no_mshrs0#numberofcyclesaccesswasblocked
system.cpu.icache.blocked::no_targets0#numberofcyclesaccesswasblocked
system.cpu.icache.avg_blocked_cycles::no_mshrsnan#averagenumberofcycleseachaccesswasblocked
system.cpu.icache.avg_blocked_cycles::no_targetsnan#averagenumberofcycleseachaccesswasblocked
system.cpu.icache.fast_writes0#numberoffastwritesperformed
system.cpu.icache.cache_copies0#numberofcachecopiesperformed
system.cpu.icache.no_allocate_misses0#Numberofmissesthatwereno-allocate
system.cpu.itb_walker_cache.replacements0#numberofreplacements
system.cpu.itb_walker_cache.tagsinuse0#Cycleaverageoftagsinuse
system.cpu.itb_walker_cache.total_refs0#Totalnumberofreferencestovalidblocks.
system.cpu.itb_walker_cache.sampled_refs0#Samplecountofreferencestovalidblocks.
system.cpu.itb_walker_cache.avg_refsnan#Averagenumberofreferencestovalidblocks.
system.cpu.itb_walker_cache.warmup_cycle0#Cyclewhenthewarmuppercentagewashit.
system.cpu.itb_walker_cache.blocked_cycles::no_mshrs0#numberofcyclesaccesswasblocked
system.cpu.itb_walker_cache.blocked_cycles::no_targets0#numberofcyclesaccesswasblocked
system.cpu.itb_walker_cache.blocked::no_mshrs0#numberofcyclesaccesswasblocked
system.cpu.itb_walker_cache.blocked::no_targets0#numberofcyclesaccesswasblocked
system.cpu.itb_walker_cache.avg_blocked_cycles::no_mshrsnan#averagenumberofcycleseachaccesswasblocked
system.cpu.itb_walker_cache.avg_blocked_cycles::no_targetsnan#averagenumberofcycleseachaccesswasblocked
system.cpu.itb_walker_cache.fast_writes0#numberoffastwritesperformed
system.cpu.itb_walker_cache.cache_copies0#numberofcachecopiesperformed
system.cpu.itb_walker_cache.no_allocate_misses0#Numberofmissesthatwereno-allocate
system.cpu.dtb_walker_cache.replacements0#numberofreplacements
system.cpu.dtb_walker_cache.tagsinuse0#Cycleaverageoftagsinuse
system.cpu.dtb_walker_cache.total_refs0#Totalnumberofreferencestovalidblocks.
system.cpu.dtb_walker_cache.sampled_refs0#Samplecountofreferencestovalidblocks.
system.cpu.dtb_walker_cache.avg_refsnan#Averagenumberofreferencestovalidblocks.
system.cpu.dtb_walker_cache.warmup_cycle0#Cyclewhenthewarmuppercentagewashit.
system.cpu.dtb_walker_cache.blocked_cycles::no_mshrs0#numberofcyclesaccesswasblocked
system.cpu.dtb_walker_cache.blocked_cycles::no_targets0#numberofcyclesaccesswasblocked
system.cpu.dtb_walker_cache.blocked::no_mshrs0#numberofcyclesaccesswasblocked
system.cpu.dtb_walker_cache.blocked::no_targets0#numberofcyclesaccesswasblocked
system.cpu.dtb_walker_cache.avg_blocked_cycles::no_mshrsnan#averagenumberofcycleseachaccesswasblocked
system.cpu.dtb_walker_cache.avg_blocked_cycles::no_targetsnan#averagenumberofcycleseachaccesswasblocked
system.cpu.dtb_walker_cache.fast_writes0#numberoffastwritesperformed
system.cpu.dtb_walker_cache.cache_copies0#numberofcachecopiesperformed
system.cpu.dtb_walker_cache.no_allocate_misses0#Numberofmissesthatwereno-allocate
system.cpu.dcache.replacements0#numberofreplacements
system.cpu.dcache.tagsinuse87.797252#Cycleaverageoftagsinuse
system.cpu.dcache.total_refs1889#Totalnumberofreferencestovalidblocks.
system.cpu.dcache.sampled_refs135#Samplecountofreferencestovalidblocks.
system.cpu.dcache.avg_refs13.992593#Averagenumberofreferencestovalidblocks.
system.cpu.dcache.warmup_cycle0#Cyclewhenthewarmuppercentagewashit.
system.cpu.dcache.occ_blocks::cpu.data87.797252#Averageoccupiedblocksperrequestor
system.cpu.dcache.occ_percent::cpu.data0.171479#Averagepercentageofcacheoccupancy
system.cpu.dcache.occ_percent::total0.171479#Averagepercentageofcacheoccupancy
system.cpu.dcache.ReadReq_hits::cpu.data1028#numberofReadReqhits
system.cpu.dcache.ReadReq_hits::total1028#numberofReadReqhits
system.cpu.dcache.WriteReq_hits::cpu.data861#numberofWriteReqhits
system.cpu.dcache.WriteReq_hits::total861#numberofWriteReqhits
system.cpu.dcache.demand_hits::cpu.data1889#numberofdemand(read+write)hits
system.cpu.dcache.demand_hits::total1889#numberofdemand(read+write)hits
system.cpu.dcache.overall_hits::cpu.data1889#numberofoverallhits
system.cpu.dcache.overall_hits::total1889#numberofoverallhits
system.cpu.dcache.ReadReq_misses::cpu.data56#numberofReadReqmisses
system.cpu.dcache.ReadReq_misses::total56#numberofReadReqmisses
system.cpu.dcache.WriteReq_misses::cpu.data79#numberofWriteReqmisses
system.cpu.dcache.WriteReq_misses::total79#numberofWriteReqmisses
system.cpu.dcache.demand_misses::cpu.data135#numberofdemand(read+write)misses
system.cpu.dcache.demand_misses::total135#numberofdemand(read+write)misses
system.cpu.dcache.overall_misses::cpu.data135#numberofoverallmisses
system.cpu.dcache.overall_misses::total135#numberofoverallmisses
system.cpu.dcache.ReadReq_accesses::cpu.data1084#numberofReadReqaccesses(hits+misses)
system.cpu.dcache.ReadReq_accesses::total1084#numberofReadReqaccesses(hits+misses)
system.cpu.dcache.WriteReq_accesses::cpu.data940#numberofWriteReqaccesses(hits+misses)
system.cpu.dcache.WriteReq_accesses::total940#numberofWriteReqaccesses(hits+misses)
system.cpu.dcache.demand_accesses::cpu.data2024#numberofdemand(read+write)accesses
system.cpu.dcache.demand_accesses::total2024#numberofdemand(read+write)accesses
system.cpu.dcache.overall_accesses::cpu.data2024#numberofoverall(read+write)accesses
system.cpu.dcache.overall_accesses::total2024#numberofoverall(read+write)accesses
system.cpu.dcache.ReadReq_miss_rate::cpu.data0.051661#missrateforReadReqaccesses
system.cpu.dcache.ReadReq_miss_rate::total0.051661#missrateforReadReqaccesses
system.cpu.dcache.WriteReq_miss_rate::cpu.data0.084043#missrateforWriteReqaccesses
system.cpu.dcache.WriteReq_miss_rate::total0.084043#missrateforWriteReqaccesses
system.cpu.dcache.demand_miss_rate::cpu.data0.066700#missratefordemandaccesses
system.cpu.dcache.demand_miss_rate::total0.066700#missratefordemandaccesses
system.cpu.dcache.overall_miss_rate::cpu.data0.066700#missrateforoverallaccesses
system.cpu.dcache.overall_miss_rate::total0.066700#missrateforoverallaccesses
system.cpu.dcache.blocked_cycles::no_mshrs0#numberofcyclesaccesswasblocked
system.cpu.dcache.blocked_cycles::no_targets0#numberofcyclesaccesswasblocked
system.cpu.dcache.blocked::no_mshrs0#numberofcyclesaccesswasblocked
system.cpu.dcache.blocked::no_targets0#numberofcyclesaccesswasblocked
system.cpu.dcache.avg_blocked_cycles::no_mshrsnan#averagenumberofcycleseachaccesswasblocked
system.cpu.dcache.avg_blocked_cycles::no_targetsnan#averagenumberofcycleseachaccesswasblocked
system.cpu.dcache.fast_writes0#numberoffastwritesperformed
system.cpu.dcache.cache_copies0#numberofcachecopiesperformed
system.cpu.dcache.no_allocate_misses0#Numberofmissesthatwereno-allocate
----------EndSimulationStatistics----------