ARM工作模式选择（汇编语言）分析

;/*-----------------------------------------------------------------------------------------------------------*/
;/*	 								constant define		            */  
;/*-----------------------------------------------------------------------------------------------------------*/
		EXPORT start

;/*-----------------------------------------------------------------------------------------------------------*/
;/*	 								code	    	           		  */			 
;/*-----------------------------------------------------------------------------------------------------------*/
		AREA    |.text|, CODE, READONLY
start
;/*-----------------------------------------------------------------------------------------------------------*/
;/* Setup interrupt / exception vectors					         */				    
;/*-----------------------------------------------------------------------------------------------------------*/
		
		b		Reset_Handler
Undefined_Handler
		b		Undefined_Handler
		b		SWI_Handler
Prefetch_Handler
		b		Prefetch_Handler
Abort_Handler
		b 		Abort_Handler
		nop									 ;/* Reserved vector */				 
IRQ_Handler
		b		IRQ_Handler
FIQ_Handler
		b		FIQ_Handler

SWI_Handler
	   	bx lr
       
Reset_Handler

;/*----------------------------------------------------------------------------------------------------------------------*/
;/* 	into System mode													        */  
;/*----------------------------------------------------------------------------------------------------------------------*/
		mrs  r0,cpsr							;/* read CPSR value             */    
		                                        ;/* 将CPSR的值读入r0之中        */
		                                        ;/* MSR     CPSR, R0                ; 复制 R0 到 CPSR 中*/
		                                        ;/* Move to Register from state register!(MRS)               */
		                                        ;/* 同样，在ARM处理器中，只有MSR指令可以对状态寄存器CPSR和SPSR进行写操作。与MRS配合使用，可以实现对CPSR或SPSR寄存器的读-修改-写操作，可以切换处理器模式、或者允许/禁止IRQ/FIQ中断等*/
		bic  r0,r0,#0x1f						;/* clear low 5 bit             */			 
		orr  r0,r0,#0x1f						;/* set the mode as System mode */				 
		msr  cpsr_cxfs,r0

		mov r0, #1								;/* initialization the register in System mode */		    
		mov r1, #2	
		mov r2, #3	
		mov r3, #4	
		mov r4, #5	
		mov r5, #6	
		mov r6, #7	
		mov r7, #8	
		mov r8, #9	
		mov r9, #10	
		mov r10, #11	
		mov r11, #12
		mov r12, #13	
		mov r13, #14	
		mov r14, #15

;/*----------------------------------------------------------------------------------------------------------------------*/
;/* 	into FIQ mode													           */  
;/*----------------------------------------------------------------------------------------------------------------------*/
		mrs  r0,cpsr							;/* read CPSR value             */		    
		bic  r0,r0,#0x1f						;/* clear low 5 bit             */		    
		orr  r0,r0,#0x11						;/* set the mode as FIQ mode    */  
		msr  cpsr_cxfs,r0

		mov r8, #16								;/* initialization the register in FIQ mode */			  
		mov r9, #17	
		mov r10, #18	
		mov r11, #19	
		mov r12, #20	
		mov r13, #21	
		mov r14, #22

;/*----------------------------------------------------------------------------------------------------------------------*/
;/* 	into SVC mode													           */  
;/*----------------------------------------------------------------------------------------------------------------------*/
		mrs  r0,cpsr							;/* read CPSR value             */		 
		bic  r0,r0,#0x1f						;/* clear low 5 bit             */		 
		orr  r0,r0,#0x13						;/* set the mode as SVC mode    */		   
		msr  cpsr_cxfs,r0

		mov r13, #23							;/* initialization the register in SVC mode */		    
		mov r14, #24

;/*----------------------------------------------------------------------------------------------------------------------*/
;/* 	into Abort mode													        */   
;/*----------------------------------------------------------------------------------------------------------------------*/
		mrs  r0,cpsr							;/* read CPSR value             */		  
		bic  r0,r0,#0x1f						;/* clear low 5 bit             */		   
		orr  r0,r0,#0x17						;/* set the mode as Abort mode  */		  
		msr  cpsr_cxfs,r0

	    mov r13, #25							;/* initialization the register in Abort mode */		    
		mov r14, #26

;/*----------------------------------------------------------------------------------------------------------------------*/
;/* 	into IRQ mode												              */  
;/*----------------------------------------------------------------------------------------------------------------------*/
		mrs  r0,cpsr							;/* read CPSR value            */		 
		bic  r0,r0,#0x1f						;/* clear low 5 bit            */		 
		orr  r0,r0,#0x12						;/* set the mode as IRQ mode   */		   
		msr  cpsr_cxfs,r0

		mov r13, #27							;/* initialization the register in IRQ mode */		    
		mov r14, #28

;//		swi 0x01				; //
;/*----------------------------------------------------------------------------------------------------------------------*/
;/* 	into UNDEF mode													       */    
;/*----------------------------------------------------------------------------------------------------------------------*/
		mrs  r0,cpsr							;/* read CPSR value            */		   
		bic  r0,r0,#0x1f						;/* clear low 5 bit            */		 
		orr  r0,r0,#0x1b						;/* set the mode as UNDEF mode */		 
		msr  cpsr_cxfs,r0  

    	mov r13, #29							;/* initialization the register in UNDEF mode */		  
		mov r14, #30

 
        b	Reset_Handler	                    ;/* jump back to  Reset_Handler */		  

		END