F2812的Flash烧写程序要求
2011-03-30 21:14
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F2812的Flash烧写程序要求
1、cmd文件要用符合flash烧写的cmd文件，不同于sram用的cmd文件；
2812_flash.cmd文件如下：
MEMORY
{
PAGE 0 :
OTP : origin = 0x3D7800, length = 0x000800
FLASHJ : origin = 0x3D8000, length = 0x002000
FLASHI : origin = 0x3DA000, length = 0x002000
FLASHH : origin = 0x3DC000, length = 0x004000
FLASHG : origin = 0x3E0000, length = 0x004000
FLASHF : origin = 0x3E4000, length = 0x004000
FLASHE : origin = 0x3E8000, length = 0x004000
FLASHD : origin = 0x3EC000, length = 0x004000
FLASHC : origin = 0x3F0000, length = 0x004000
FLASHB : origin = 0x3F4000, length = 0x002000
FLASHA : origin = 0x3F6000, length = 0x001F80
CSM_RSVD : origin = 0x3F7F80, length = 0x000076
BEGIN : origin = 0x3F7FF6, length = 0x000002
CSM_PWL : origin = 0x3F7FF8, length = 0x000008
ROM : origin = 0x3FF000, length = 0x000FC0
RESET : origin = 0x3FFFC0, length = 0x000002
VECTORS : origin = 0x3FFFC2, length = 0x00003E
RAML0 : origin = 0x008000, length = 0x001000
PAGE 1 :
ZONE0 : origin = 0x002000, length = 0x002000
ZONE1 : origin = 0x004000, length = 0x002000
ZONE2 : origin = 0x080000, length = 0x080000
ZONE6 : origin = 0x100000, length = 0x080000
RAMM0 : origin = 0x000000, length = 0x000400
RAMM1 : origin = 0x000400, length = 0x000400
RAML1 : origin = 0x009000, length = 0x001000
DRAMH0 : origin = 0x3f9000, length = 0x001000
DEV_EMU : origin = 0x000880, length = 0x000180
FLASH_REGS : origin = 0x000A80, length = 0x000060
CSM : origin = 0x000AE0, length = 0x000010
XINTF : origin = 0x000B20, length = 0x000020
CPU_TIMER0 : origin = 0x000C00, length = 0x000008
CPU_TIMER1 : origin = 0x000C08, length = 0x000008
CPU_TIMER2 : origin = 0x000C10, length = 0x000008
PIE_CTRL : origin = 0x000CE0, length = 0x000020
PIE_VECT : origin = 0x000D00, length = 0x000100
ECAN_A : origin = 0x006000, length = 0x000100
ECAN_AMBOX : origin = 0x006100, length = 0x000100
SYSTEM : origin = 0x007010, length = 0x000020
SPI_A : origin = 0x007040, length = 0x000010
SCI_A : origin = 0x007050, length = 0x000010
XINTRUPT : origin = 0x007070, length = 0x000010
GPIOMUX : origin = 0x0070C0, length = 0x000020
GPIODAT : origin = 0x0070E0, length = 0x000020
ADC : origin = 0x007100, length = 0x000020
EV_A : origin = 0x007400, length = 0x000040
EV_B : origin = 0x007500, length = 0x000040
SPI_B : origin = 0x007740, length = 0x000010
SCI_B : origin = 0x007750, length = 0x000010
MCBSP_A : origin = 0x007800, length = 0x000040
}
SECTIONS
{
.cinit : > FLASHC, PAGE = 0
.pinit : > FLASHC, PAGE = 0
.text : > FLASHC, PAGE = 0
codestart : > BEGIN, PAGE = 0
ramfuncs
: LOAD = FLASHC, PAGE = 0
RUN = RAML0, PAGE = 0
RUN_START(_RamfuncsRunStart),
LOAD_START(_RamfuncsLoadStart),
LOAD_END(_RamfuncsLoadEnd)
.delayasmpage
: LOAD = FLASHC, PAGE = 0
RUN = RAML0, PAGE = 0
RUN_START(_DelayasmRunStart),
LOAD_START(_DelayasmLoadStart),
LOAD_END(_DelayasmLoadEnd)
.xintfwrasmpage
: LOAD = FLASHC, PAGE = 0
RUN = RAML0, PAGE = 0
RUN_START(_XintfwrasmRunStart),
LOAD_START(_XintfwrasmLoadStart),
LOAD_END(_XintfwrasmLoadEnd)
.xintfmemcpyasmpage
: LOAD = FLASHC, PAGE = 0
RUN = RAML0, PAGE = 0
RUN_START(_XintfmemcpyasmRunStart),
LOAD_START(_XintfmemcpyasmLoadStart),
LOAD_END(_XintfmemcpyasmLoadEnd)
.xintfrdasmpage
: LOAD = FLASHC, PAGE = 0
RUN = RAML0, PAGE = 0
RUN_START(_XintfrdasmRunStart),
LOAD_START(_XintfrdasmLoadStart),
LOAD_END(_XintfrdasmLoadEnd)
.stack : > RAMM1, PAGE = 1
.bss : > RAML1, PAGE = 1
.ebss : > RAML1, PAGE = 1
.cio : > RAML1, PAGE = 1
.sysmem : > RAML1, PAGE = 1
.esysmem : > RAML1, PAGE = 1
.const : > FLASHA, PAGE = 0
.econst : > FLASHA, PAGE = 0
.switch : > FLASHA, PAGE = 0
DevEmuRegsFile : > DEV_EMU, PAGE = 1
FlashRegsFile : > FLASH_REGS, PAGE = 1
CsmRegsFile : > CSM, PAGE = 1
XintfRegsFile : > XINTF, PAGE = 1
CpuTimer0RegsFile : > CPU_TIMER0, PAGE = 1
CpuTimer1RegsFile : > CPU_TIMER1, PAGE = 1
CpuTimer2RegsFile : > CPU_TIMER2, PAGE = 1
PieCtrlRegsFile : > PIE_CTRL, PAGE = 1
PieVectTable : > PIE_VECT, PAGE = 1
ECanaRegsFile : > ECAN_A, PAGE = 1
ECanaMboxesFile : > ECAN_AMBOX PAGE = 1
SysCtrlRegsFile : > SYSTEM, PAGE = 1
SpiaRegsFile : > SPI_A, PAGE = 1
SciaRegsFile : > SCI_A, PAGE = 1
XIntruptRegsFile : > XINTRUPT, PAGE = 1
GpioMuxRegsFile : > GPIOMUX, PAGE = 1
GpioDataRegsFile : > GPIODAT PAGE = 1
AdcRegsFile : > ADC, PAGE = 1
EvaRegsFile : > EV_A, PAGE = 1
EvbRegsFile : > EV_B, PAGE = 1
ScibRegsFile : > SCI_B, PAGE = 1
McbspaRegsFile : > MCBSP_A, PAGE = 1
csm_rsvd : > CSM_RSVD, PAGE = 0
CsmPwlFile : > CSM_PWL, PAGE = 0
IQmath : > FLASHA, PAGE = 0
IQmathTables : > ROM, PAGE = 0, TYPE = NOLOAD
.reset : > RESET, PAGE = 0, TYPE = DSECT
vectors : > VECTORS, PAGE = 0, TYPE = DSECT
}
2、添加文件DSP281x_CodeStartBranch.asm，用于复位后调转到_c_int00（在库文件rts2800_ml.lib中）；
;// TI File $Revision: /main/2 $
;// Checkin $Date: April 29, 2005 11:11:32 $
;//###########################################################################
;//
;// FILE: DSP281x_CodeStartBranch.asm
;//
;// TITLE: Branch for redirecting code execution after boot.
;//
;//###########################################################################
;// $TI Release:$
;// $Release Date:$
;//###########################################################################
***********************************************************************
WD_DISABLE .set 1 ;set to 1 to disable WD, else set to 0
.ref _c_int00
***********************************************************************
* Function: codestart section
*
* Description: Branch to code starting point
***********************************************************************
.sect "codestart"
code_start:
.if WD_DISABLE == 1
LB wd_disable ;Branch to watchdog disable code
.else
LB _c_int00 ;Branch to start of boot.asm in RTS library
.endif
;end codestart section
***********************************************************************
* Function: wd_disable
*
* Description: Disables the watchdog timer
***********************************************************************
.if WD_DISABLE == 1
.text
wd_disable:
SETC OBJMODE ;Set OBJMODE for 28x object code
EALLOW ;Enable EALLOW protected register access
MOVZ DP, #7029h>>6 ;Set data page for WDCR register
MOV @7029h, #0068h ;Set WDDIS bit in WDCR to disable WD
EDIS ;Disable EALLOW protected register access
LB _c_int00 ;Branch to start of boot.asm in RTS library
.endif
;end wd_disable
.end
; end of file CodeStartBranch.asm
3、添加InitFlash.c文件；
//InitFlash.c
#include "DSP28_Device.h"
#pragma CODE_SECTION(InitFlash, "ramfuncs");
// CAUTION
// This function MUST be executed out of RAM. Executing it
// out of OTP/Flash will yield unpredictable results
void InitFlash(void)
{
EALLOW;
//Pump and bank set to active mode
FlashRegs.FPWR.bit.PWR = 3;
//Clear the 3VSTAT bit
FlashRegs.FSTATUS.bit.V3STAT = 1;
////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////
//设置处理器由睡眠状态转换到独立运行状态过程的等待状态
FlashRegs.FSTDBYWAIT.bit.STDBYWAIT = 0x01FF;
//设置处理器由独立运行状态到睡眠状态过程的等待状态
FlashRegs.FACTIVEWAIT.bit.ACTIVEWAIT = 0x01FF;
//设置Flash的随机访问等待状态（Random Waitstate）
FlashRegs.FBANKWAIT.bit.RANDWAIT = 1;
//设置页切换等待状态(Paged Waitstate)
FlashRegs.FBANKWAIT.bit.PAGEWAIT = 1;
//OTP waitstates
FlashRegs.FOTPWAIT.bit.OPTWAIT = 1; //必须大于等于1
//使能Flash流水线操作，提高处理器程序在Flash中执行时系统的性能
FlashRegs.FOPT.bit.ENPIPE = 1; //此时，RANDWAIT >= PAGEWAIT >=1
EDIS;
//等待流水线操作完成，保证最后一个设置操作完成后才从该函数返回
asm(" RPT #7 || NOP");
}
//===========================================================================
// No more.
//===========================================================================
4、将InitFlash()程序从flash搬运到sram中运行，该程序不能在flash中运行，搬运步骤如下：
（1）cmd文件中定义相应的段：
ramfuncs
: LOAD = FLASHC, PAGE = 0
RUN = RAML0, PAGE = 0
RUN_START(_RamfuncsRunStart),
LOAD_START(_RamfuncsLoadStart),
LOAD_END(_RamfuncsLoadEnd)
（2）声明变量：
//InitFlash()
extern unsigned int RamfuncsRunStart;
extern unsigned int RamfuncsLoadStart;
extern unsigned int RamfuncsLoadEnd;
（3）将函数InitFlash()定位到定义的段ramfuncs中：
#pragma CODE_SECTION(InitFlash, "ramfuncs");
（4）执行InitFlash()程序前将其从flash中搬运到sram中：
//将InitFlash()程序从Flash搬到RAM中运行
memcpy(&RamfuncsRunStart,&RamfuncsLoadStart,&RamfuncsLoadEnd - &RamfuncsLoadStart);
//初始化Flash
InitFlash();
1、cmd文件要用符合flash烧写的cmd文件，不同于sram用的cmd文件；
2812_flash.cmd文件如下：
MEMORY
{
PAGE 0 :
OTP : origin = 0x3D7800, length = 0x000800
FLASHJ : origin = 0x3D8000, length = 0x002000
FLASHI : origin = 0x3DA000, length = 0x002000
FLASHH : origin = 0x3DC000, length = 0x004000
FLASHG : origin = 0x3E0000, length = 0x004000
FLASHF : origin = 0x3E4000, length = 0x004000
FLASHE : origin = 0x3E8000, length = 0x004000
FLASHD : origin = 0x3EC000, length = 0x004000
FLASHC : origin = 0x3F0000, length = 0x004000
FLASHB : origin = 0x3F4000, length = 0x002000
FLASHA : origin = 0x3F6000, length = 0x001F80
CSM_RSVD : origin = 0x3F7F80, length = 0x000076
BEGIN : origin = 0x3F7FF6, length = 0x000002
CSM_PWL : origin = 0x3F7FF8, length = 0x000008
ROM : origin = 0x3FF000, length = 0x000FC0
RESET : origin = 0x3FFFC0, length = 0x000002
VECTORS : origin = 0x3FFFC2, length = 0x00003E
RAML0 : origin = 0x008000, length = 0x001000
PAGE 1 :
ZONE0 : origin = 0x002000, length = 0x002000
ZONE1 : origin = 0x004000, length = 0x002000
ZONE2 : origin = 0x080000, length = 0x080000
ZONE6 : origin = 0x100000, length = 0x080000
RAMM0 : origin = 0x000000, length = 0x000400
RAMM1 : origin = 0x000400, length = 0x000400
RAML1 : origin = 0x009000, length = 0x001000
DRAMH0 : origin = 0x3f9000, length = 0x001000
DEV_EMU : origin = 0x000880, length = 0x000180
FLASH_REGS : origin = 0x000A80, length = 0x000060
CSM : origin = 0x000AE0, length = 0x000010
XINTF : origin = 0x000B20, length = 0x000020
CPU_TIMER0 : origin = 0x000C00, length = 0x000008
CPU_TIMER1 : origin = 0x000C08, length = 0x000008
CPU_TIMER2 : origin = 0x000C10, length = 0x000008
PIE_CTRL : origin = 0x000CE0, length = 0x000020
PIE_VECT : origin = 0x000D00, length = 0x000100
ECAN_A : origin = 0x006000, length = 0x000100
ECAN_AMBOX : origin = 0x006100, length = 0x000100
SYSTEM : origin = 0x007010, length = 0x000020
SPI_A : origin = 0x007040, length = 0x000010
SCI_A : origin = 0x007050, length = 0x000010
XINTRUPT : origin = 0x007070, length = 0x000010
GPIOMUX : origin = 0x0070C0, length = 0x000020
GPIODAT : origin = 0x0070E0, length = 0x000020
ADC : origin = 0x007100, length = 0x000020
EV_A : origin = 0x007400, length = 0x000040
EV_B : origin = 0x007500, length = 0x000040
SPI_B : origin = 0x007740, length = 0x000010
SCI_B : origin = 0x007750, length = 0x000010
MCBSP_A : origin = 0x007800, length = 0x000040
}
SECTIONS
{
.cinit : > FLASHC, PAGE = 0
.pinit : > FLASHC, PAGE = 0
.text : > FLASHC, PAGE = 0
codestart : > BEGIN, PAGE = 0
ramfuncs
: LOAD = FLASHC, PAGE = 0
RUN = RAML0, PAGE = 0
RUN_START(_RamfuncsRunStart),
LOAD_START(_RamfuncsLoadStart),
LOAD_END(_RamfuncsLoadEnd)
.delayasmpage
: LOAD = FLASHC, PAGE = 0
RUN = RAML0, PAGE = 0
RUN_START(_DelayasmRunStart),
LOAD_START(_DelayasmLoadStart),
LOAD_END(_DelayasmLoadEnd)
.xintfwrasmpage
: LOAD = FLASHC, PAGE = 0
RUN = RAML0, PAGE = 0
RUN_START(_XintfwrasmRunStart),
LOAD_START(_XintfwrasmLoadStart),
LOAD_END(_XintfwrasmLoadEnd)
.xintfmemcpyasmpage
: LOAD = FLASHC, PAGE = 0
RUN = RAML0, PAGE = 0
RUN_START(_XintfmemcpyasmRunStart),
LOAD_START(_XintfmemcpyasmLoadStart),
LOAD_END(_XintfmemcpyasmLoadEnd)
.xintfrdasmpage
: LOAD = FLASHC, PAGE = 0
RUN = RAML0, PAGE = 0
RUN_START(_XintfrdasmRunStart),
LOAD_START(_XintfrdasmLoadStart),
LOAD_END(_XintfrdasmLoadEnd)
.stack : > RAMM1, PAGE = 1
.bss : > RAML1, PAGE = 1
.ebss : > RAML1, PAGE = 1
.cio : > RAML1, PAGE = 1
.sysmem : > RAML1, PAGE = 1
.esysmem : > RAML1, PAGE = 1
.const : > FLASHA, PAGE = 0
.econst : > FLASHA, PAGE = 0
.switch : > FLASHA, PAGE = 0
DevEmuRegsFile : > DEV_EMU, PAGE = 1
FlashRegsFile : > FLASH_REGS, PAGE = 1
CsmRegsFile : > CSM, PAGE = 1
XintfRegsFile : > XINTF, PAGE = 1
CpuTimer0RegsFile : > CPU_TIMER0, PAGE = 1
CpuTimer1RegsFile : > CPU_TIMER1, PAGE = 1
CpuTimer2RegsFile : > CPU_TIMER2, PAGE = 1
PieCtrlRegsFile : > PIE_CTRL, PAGE = 1
PieVectTable : > PIE_VECT, PAGE = 1
ECanaRegsFile : > ECAN_A, PAGE = 1
ECanaMboxesFile : > ECAN_AMBOX PAGE = 1
SysCtrlRegsFile : > SYSTEM, PAGE = 1
SpiaRegsFile : > SPI_A, PAGE = 1
SciaRegsFile : > SCI_A, PAGE = 1
XIntruptRegsFile : > XINTRUPT, PAGE = 1
GpioMuxRegsFile : > GPIOMUX, PAGE = 1
GpioDataRegsFile : > GPIODAT PAGE = 1
AdcRegsFile : > ADC, PAGE = 1
EvaRegsFile : > EV_A, PAGE = 1
EvbRegsFile : > EV_B, PAGE = 1
ScibRegsFile : > SCI_B, PAGE = 1
McbspaRegsFile : > MCBSP_A, PAGE = 1
csm_rsvd : > CSM_RSVD, PAGE = 0
CsmPwlFile : > CSM_PWL, PAGE = 0
IQmath : > FLASHA, PAGE = 0
IQmathTables : > ROM, PAGE = 0, TYPE = NOLOAD
.reset : > RESET, PAGE = 0, TYPE = DSECT
vectors : > VECTORS, PAGE = 0, TYPE = DSECT
}
2、添加文件DSP281x_CodeStartBranch.asm，用于复位后调转到_c_int00（在库文件rts2800_ml.lib中）；
;// TI File $Revision: /main/2 $
;// Checkin $Date: April 29, 2005 11:11:32 $
;//###########################################################################
;//
;// FILE: DSP281x_CodeStartBranch.asm
;//
;// TITLE: Branch for redirecting code execution after boot.
;//
;//###########################################################################
;// $TI Release:$
;// $Release Date:$
;//###########################################################################
***********************************************************************
WD_DISABLE .set 1 ;set to 1 to disable WD, else set to 0
.ref _c_int00
***********************************************************************
* Function: codestart section
*
* Description: Branch to code starting point
***********************************************************************
.sect "codestart"
code_start:
.if WD_DISABLE == 1
LB wd_disable ;Branch to watchdog disable code
.else
LB _c_int00 ;Branch to start of boot.asm in RTS library
.endif
;end codestart section
***********************************************************************
* Function: wd_disable
*
* Description: Disables the watchdog timer
***********************************************************************
.if WD_DISABLE == 1
.text
wd_disable:
SETC OBJMODE ;Set OBJMODE for 28x object code
EALLOW ;Enable EALLOW protected register access
MOVZ DP, #7029h>>6 ;Set data page for WDCR register
MOV @7029h, #0068h ;Set WDDIS bit in WDCR to disable WD
EDIS ;Disable EALLOW protected register access
LB _c_int00 ;Branch to start of boot.asm in RTS library
.endif
;end wd_disable
.end
; end of file CodeStartBranch.asm
3、添加InitFlash.c文件；
//InitFlash.c
#include "DSP28_Device.h"
#pragma CODE_SECTION(InitFlash, "ramfuncs");
// CAUTION
// This function MUST be executed out of RAM. Executing it
// out of OTP/Flash will yield unpredictable results
void InitFlash(void)
{
EALLOW;
//Pump and bank set to active mode
FlashRegs.FPWR.bit.PWR = 3;
//Clear the 3VSTAT bit
FlashRegs.FSTATUS.bit.V3STAT = 1;
////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////
//设置处理器由睡眠状态转换到独立运行状态过程的等待状态
FlashRegs.FSTDBYWAIT.bit.STDBYWAIT = 0x01FF;
//设置处理器由独立运行状态到睡眠状态过程的等待状态
FlashRegs.FACTIVEWAIT.bit.ACTIVEWAIT = 0x01FF;
//设置Flash的随机访问等待状态（Random Waitstate）
FlashRegs.FBANKWAIT.bit.RANDWAIT = 1;
//设置页切换等待状态(Paged Waitstate)
FlashRegs.FBANKWAIT.bit.PAGEWAIT = 1;
//OTP waitstates
FlashRegs.FOTPWAIT.bit.OPTWAIT = 1; //必须大于等于1
//使能Flash流水线操作，提高处理器程序在Flash中执行时系统的性能
FlashRegs.FOPT.bit.ENPIPE = 1; //此时，RANDWAIT >= PAGEWAIT >=1
EDIS;
//等待流水线操作完成，保证最后一个设置操作完成后才从该函数返回
asm(" RPT #7 || NOP");
}
//===========================================================================
// No more.
//===========================================================================
4、将InitFlash()程序从flash搬运到sram中运行，该程序不能在flash中运行，搬运步骤如下：
（1）cmd文件中定义相应的段：
ramfuncs
: LOAD = FLASHC, PAGE = 0
RUN = RAML0, PAGE = 0
RUN_START(_RamfuncsRunStart),
LOAD_START(_RamfuncsLoadStart),
LOAD_END(_RamfuncsLoadEnd)
（2）声明变量：
//InitFlash()
extern unsigned int RamfuncsRunStart;
extern unsigned int RamfuncsLoadStart;
extern unsigned int RamfuncsLoadEnd;
（3）将函数InitFlash()定位到定义的段ramfuncs中：
#pragma CODE_SECTION(InitFlash, "ramfuncs");
（4）执行InitFlash()程序前将其从flash中搬运到sram中：
//将InitFlash()程序从Flash搬到RAM中运行
memcpy(&RamfuncsRunStart,&RamfuncsLoadStart,&RamfuncsLoadEnd - &RamfuncsLoadStart);
//初始化Flash
InitFlash();
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