waiting for core to be armer slow or stopped clock
2011-02-20 18:05
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出现这个错误的原因是
没有时钟
之所以出现这个错误是因为不理解FPGA的工作原理，
FPGA中，module的时钟可以由FPGA本身的system clock提供，在datasheet里搜索 system clock， 会有Y2 和AJ15 两个结果。 之前选择的是Y2， 这个不是pin的名字，所以相当于 根本没有时钟。
在user constraints中改loc 就没有问题了
没有时钟
之所以出现这个错误是因为不理解FPGA的工作原理，
FPGA中，module的时钟可以由FPGA本身的system clock提供，在datasheet里搜索 system clock， 会有Y2 和AJ15 两个结果。 之前选择的是Y2， 这个不是pin的名字，所以相当于 根本没有时钟。
在user constraints中改loc 就没有问题了
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