FPGA与ASIC资源数量换算

The basic element in FPGA is quite different from ASIC gate count.o(L(n&/.N2S_-?

As FPGA is becoming more and more complicated, It's better to understand what

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the basic element is in FPGA.

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For example:

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XC2S50 or XCV50E - Number of LUTS = 384 CLB x 2 Slices x 2 LUTS = 1536.

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Each LUT in SRL16E mode provides 16 flip-flops, and each is followed by a )h? ~1^[d

dedicated flip-flop. So total number of flip-flops is $T.G;E
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1536 x 17 = 26,122 MJg$D+]W
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Now, how many gates per flip-flop in an ASIC. Let's

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choose 4 to stop any arguments... 0f&~|w.p

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26,122 x 4 = 104,448 gates rUM*v
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For our 50,000 gate device(XC2S50, the 50 means 50K system gates) now has over 100,000 gates -KF
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and we haven't even counted the 32,768 bits of block RAM yet.
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So, it's hard to have a simple equation for the ASIC gates conversion.

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what an SRL16E is? THis might be your next question. The more you
understand FPGA structure, the mode accurate of gate count estimation.

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Estimate a design in 'slices' and 'features' and not gates...